1.School of Microelectronics, South China University of Technology, Guangzhou 510640, China 2.Sino-Singapore International Joint Research Institute, Guangzhou 510700, China
Fund Project:Project supported by the National Key R&D Program of China (Grant No. 2018YFB1802100) and the Key-Area Research and Development Program of Guangdong Province, China (Grant No. 2019B010143003).
Received Date:13 April 2021
Accepted Date:21 June 2021
Available Online:15 August 2021
Published Online:05 November 2021
Abstract:The research on capacitance model of AlGaN/GaN high electron mobility transistor (HEMT) is of great significance in modern communication technology and circuit simulation. At present, many modeling methods of AlGaN/GaN HEMT capacitance models have been proposed. The gate capacitance is composed of intrinsic capacitance and fringe capacitance. However, most researches focus on the intrinsic capacitance but ignore the fringe capacitance, which leads to a large error in the final results. A total gate capacitance model including fringe capacitance needs to be established.In this paper, the conformal mapping method and transition functions are used to establish the inner fringe capacitance model, and the intrinsic capacitance model is derived based on the Ward-Dutton charge distribution principle. The intrinsic capacitance model and the outer fringe capacitance model are combined to obtain the source/drain total gate capacitance model. Based on this model, the relationship between the bias condition and the fringe capacitance is analyzed. We compare the difference between the effects of external bias on gate capacitance with and without the fringe capacitance considered, and the error rate of the gate capacitance in the on state is calculated without considering the fringe capacitance.The results show that the fringe capacitance is mainly affected by the gate bias. When the fringe capacitance is taken into account in the intrinsic capacitance model, the total capacitance model is larger than that without considering the fringe capacitance. For the gate capacitance, if the influence of fringing capacitance is not considered, the gate capacitance error rate of the device in the OFF state can reach 80%; for fringing capacitance, the error rate is over 65% when the device is working in the saturation region. Keywords:high electron mobility transistor/ inner fringing capacitance/ total gate capacitance/ model
对考虑了边缘电容的Cgd_total电容表达式(2)和Cgd电容表达式(3)进行仿真, 结果如图8所示. 图中虚线为Cgd, 实线为Cgd_total, 可以看出考虑了边缘电容后的Cgd_total相对于Cgd来说整体向上平移, 这是由(Cofs + Cifs)造成的. 图 8Cgd总电容与Vds的关系图 Figure8. Relationship between total capacitance of Cgd and Vds .