1.School of Microelectronics, South China University of Technology, Guangzhou 510640, China 2.Sino-Singapore International Joint Research Institute, Guangzhou 510700, China
Fund Project:Project supported by the National Key R&D Program of China (Grant No. 2018YFB1802100) and the Key-Area Research and Development Program of Guangdong Province, China (Grant No. 2019B010143003).
Received Date:13 April 2021
Accepted Date:21 June 2021
Available Online:15 August 2021
Published Online:05 November 2021
Abstract:The research on capacitance model of AlGaN/GaN high electron mobility transistor (HEMT) is of great significance in modern communication technology and circuit simulation. At present, many modeling methods of AlGaN/GaN HEMT capacitance models have been proposed. The gate capacitance is composed of intrinsic capacitance and fringe capacitance. However, most researches focus on the intrinsic capacitance but ignore the fringe capacitance, which leads to a large error in the final results. A total gate capacitance model including fringe capacitance needs to be established.In this paper, the conformal mapping method and transition functions are used to establish the inner fringe capacitance model, and the intrinsic capacitance model is derived based on the Ward-Dutton charge distribution principle. The intrinsic capacitance model and the outer fringe capacitance model are combined to obtain the source/drain total gate capacitance model. Based on this model, the relationship between the bias condition and the fringe capacitance is analyzed. We compare the difference between the effects of external bias on gate capacitance with and without the fringe capacitance considered, and the error rate of the gate capacitance in the on state is calculated without considering the fringe capacitance.The results show that the fringe capacitance is mainly affected by the gate bias. When the fringe capacitance is taken into account in the intrinsic capacitance model, the total capacitance model is larger than that without considering the fringe capacitance. For the gate capacitance, if the influence of fringing capacitance is not considered, the gate capacitance error rate of the device in the OFF state can reach 80%; for fringing capacitance, the error rate is over 65% when the device is working in the saturation region. Keywords:high electron mobility transistor/ inner fringing capacitance/ total gate capacitance/ model
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2.栅极电容模型图1是AlGaN/GaN HEMT栅极电容处于开启状态或者关断状态下的电容示意图. 图中的电容可以分为本征电容Cgs/d、外部边缘电容Cofs/d、内部边缘电容Cifs/d以及栅极和沟道之间形成的电容Cgc. 当器件处于关断(OFF)状态时, 如图1(a)所示, 施加的栅极偏压小于阈值电压, 在栅极下方形成一定长度的耗尽区, 并且受栅极两边表面态的影响, 沟道耗尽层向两边拓宽[13], 该耗尽层把沟道分隔为源端沟道和漏端沟道, 每一端都由1个本征电容和2个边缘电容构成, 这3个电容的总和就是源(漏)端在关断状态下的总电容值. 随着Vg偏压逐渐上升, 栅极两边的类施主表面态释放电子[14,15], 由该“虚栅”作用产生的耗尽层消失. 同时, 由于栅压提高, 异质结势阱加深进而逐渐积累电子, 栅极下方的耗尽层也在变窄. 在耗尽层收窄的情况下, 二维电子气(two-dimensional electron gas, 2DEG)沟道不断往中间靠拢, 直至源漏两端的2DEG沟道完全闭合, 这时内部边缘电容完全消失, 转换为栅极—2DEG沟道电容Cgc, 如图1(b)所示. 因此, 对于内部边缘电容来说, 器件从关态到开态过程中是一个逐渐变化的过程. 图 1 不同工作状态下AlGaN/GaN HEMT栅极电容的示意图 (a)处于关断状态; (b)处于开启状态 Figure1. Schematic of AlGaN/GaN HEMT gate capacitances in different states: (a) In the OFF-state; (b) in the ON-state
对考虑了边缘电容的Cgd_total电容表达式(2)和Cgd电容表达式(3)进行仿真, 结果如图8所示. 图中虚线为Cgd, 实线为Cgd_total, 可以看出考虑了边缘电容后的Cgd_total相对于Cgd来说整体向上平移, 这是由(Cofs + Cifs)造成的. 图 8Cgd总电容与Vds的关系图 Figure8. Relationship between total capacitance of Cgd and Vds .