1.Key Laboratory of Optoelectronics Technology, Ministry of Education, College of Microelectronics, Beijing University of Technology, Beijing 100124, China 2.National and Local United Engineering Laboratory of Flat Panel Display Technology, Fuzhou University, and Fujian Science and Technology Innovation Laboratory for Optoelectronic Information of China, Fuzhou 350100, China 3.Quantum Device Physics Laboratory, Chalmers University of Technology, G?teborg 41296, Sweden
Fund Project:Project supported by the National Basic Research Program of China (Grant No. 2018YFA0209000) and the Fujian Provincial Innovation Laboratory of Optoelectronic Information Technology Project, China (Grant No. 2021ZZ122).
Received Date:19 January 2021
Accepted Date:24 May 2021
Available Online:07 June 2021
Published Online:05 October 2021
Abstract:In the information display field, micro-light-emitting diodes (micro-LEDs) possess high potentials and they are expected to lead the direction of developing the next-generation new display technologies. Their display performances are superior to those produced by the currently prevailing liquid crystal and organic light-emitting diode based technologies. However, the micro-LED pixels and their driving circuits are often fabricated on different wafers, which implies that the so-called mass transfer seems to be inevitable, thus facing an obvious bottleneck. In this paper, the emerging graphene field effect transistors are used as the driving elements and integrated onto the GaN micro-LEDs, which is because the pixels and drivers are prepared directly on the same wafer, the technical problem of mass transfer is fundamentally bypassed. Furthermore, in traditional lithographic process, the ultraviolet photoresist directly contacts the graphene, which introduces severe carrier doping, thereby leading to deteriorated graphene transistor properties. This, not surprisingly, further translates into lower performances of the integrated devices. In the present work, proposed is a technique in which the polymethyl methacrylate (PMMA) thin films act as both the protection layers and the interlayers when optimizing the graphene field effect transistor processing. The PMMA layers are sandwiched between the graphene and the ultraviolet photoresist, which is a brand new device fabrication process. First, the new process is tested in discrete graphene field effect transistors. Compared with those devices that are processed without the PMMA protection thin films, the graphene devices fabricated with the new technology typically show their Dirac point at a gate voltage (Vg) deviation from Vg = 0, that is, 22 V lower than their counterparts. In addition, an increase in the carrier mobility of 32% is also observed. Finally, after applying the newly developed fabrication process to the pixel-and-driver integrated devices, it is found that their performances are improved significantly. With this new technique, the ultraviolet photoresist no longer directly contacts the sensitive graphene channel because of the PMMA protection. The doping effect and the performance dropping are dramatically reduced. The technique is facile and cheap, and it is also applicable to two-dimensional materials besides graphene, such as MoS2 and h-BN. It is hoped that it is of some value for device engineers working in this field. Keywords:graphene/ gallium nitride/ micro-light emitting diode/ polymethyl methacrylate
使用Horiba France Sas公司的LABRAM HR EVO拉曼光谱仪, 先对已经转移到目标衬底上的商用单层石墨烯(系CVD生长在铜箔上)进行表征, 然后对优化工艺制备的沟道石墨烯和对比组的沟道石墨烯分别进行表征. 最后, 用Keysight公司生产的综合分析仪B5100A测试石墨烯场效应晶体管的电学特性, 包括转移和输出特性等.
3.分立石墨烯晶体管的实验结果与讨论对实验中的石墨烯用拉曼光谱仪进行表征, 拉曼光谱如图2所示. 黑色曲线为转移到目标衬底SiO2/Si上、未做器件工艺的石墨烯的拉曼光谱, 可以发现其特征峰中位于2700 cm–1左右的2D和1580 cm–1附近的G峰的峰值强度比I2D/IG约为1.6, 且2D峰的半高宽(FWHM)为35 cm–1, 表明石墨烯的层数为单层[19], 且位于1350 cm–1左右的缺陷峰D峰几乎没有, 表明该石墨烯结构缺陷较少. 红色曲线为优化工艺后有PMMA保护的沟道石墨烯拉曼光谱, 和黑色曲线对比, 发现二者较为接近, I2D/IG约为1.6, D峰强度仍然很低, 说明采用新工艺后, 引入的缺陷和有机物残留的确较少. 蓝色曲线为对比实验中, 直接接触光刻胶的石墨烯拉曼光谱, 相比于有PMMA垫层保护的器件, 对照组的石墨烯D峰显著增高, 已达到G峰高度的37%. 虽然都为单层石墨烯, 但是直接接触紫外光刻胶后I2D/IG比值下降到0.72, 表明紫外光刻胶的有机物残留引入的空穴掺杂, 大大降低了石墨烯的质量, 并且在石墨烯的拉曼光谱中体现出来[8,19]. 这种变化趋势, 在器件上的石墨烯的拉曼成像中表现得更明显, 有更直观的反映(如图3所示). 图 2 未做器件工艺的石墨烯(黑色曲线)、有PMMA保护的石墨烯沟道(红色曲线)、无PMMA保护的石墨烯沟道的拉曼光谱(蓝色曲线) Figure2. Raman spectra of the graphene that does not undergo any device processing (black curve), graphene channel with PMMA protection (red curve), and graphene channel without PMMA protection (blue curve).
图 3 (a), (b), (c)分别是未做工艺的石墨烯、新工艺有PMMA保护、旧工艺无PMMA保护ID/IG拉曼显微成像; (d), (e), (f)分别是未做工艺的石墨烯、新工艺有PMMA保护、旧工艺无PMMA保护I2 D/IG拉曼显微成像 Figure3. (a), (b), (c) are ID/IG Raman mapping of graphene without processing, graphene with new processing with PMMA protection, and graphene with old processing with no PMMA protection, respectively; (d), (e), (f) are I2 D/IG Raman mapping of graphene without processing, graphene with new processing with PMMA protection, and graphene with old processing with no PMMA protection, respectively.
石墨烯的本征费米能级位于导带和价带中间, 通过外加栅电压, 形成垂直于石墨烯平面方向上的电场, 当栅极电压为正时, 费米能级移动到导带, 此时多数载流子为电子, 电压升高电子浓度增大, 电阻降低; 当栅极电压为负时, 费米能级移动到价带, 此时多数载流子为空穴, 电压升高空穴浓度增大, 电阻也降低. 在石墨烯器件的实际制备过程中, 石墨烯接触水、氧气分子以及光刻胶引起电荷转移, 导致其费米能级位于价带呈现p型掺杂[6], 但是上面分析的费米能级随栅压的变化趋势仍然有效, 可以通过调控栅压而调节沟道电流大小. 对新工艺制备的石墨烯场效应晶体管的电学特性进行测试, 转移特性曲线如图4(a)所示, 红色曲线为去胶前测量所得, 栅压在–40—40 V范围内并没有出现狄拉克点(在没有掺杂或者掺杂较少的石墨烯中狄拉克点应出现在Vg = 0 V附近), 这说明虽然有PMMA垫层的阻隔, 但只要主要掺杂源亦即有机物残留不去除, 电荷依然可以在石墨烯与光刻胶之间转移, 造成一定的p型掺杂. 这种通过聚合物薄膜的电荷转移在外延石墨烯中也有类似情况的报道[20]. 样品浸泡在丙酮溶液中去胶后, 继续测试石墨烯场效应晶体管的转移特性曲线(黑色曲线), 发现狄拉克点左移至测量范围以内, 出现在Vg = 16 V左右, 说明光刻胶的去除使掺杂现象大大降低. 但是, 受到空气中的水、氧分子和氧化硅界面态[21], 以及残存的极少量有机物的影响[6], 沟道石墨烯还是存在少许p型掺杂. 根据跨导计算公式 图 4 (a)在有PMMA垫层保护的情况下, 去胶前后石墨烯场效应晶体管的转移特性曲线; (b) 优化后石墨烯场效应晶体管在室温下的输出特性曲线 Figure4. (a) In the case of PMMA underlayer protection, the transfer characteristic curve before and after removing the resist from the graphene field effect transistor; (b) output characteristic curves of the optimized graphene field effect transistor at room temperature.
4.新工艺在micro-LED/石墨烯场效应晶体管单片集成器件中的应用基于GaN的micro-LED自发光显示, 是下一代新型显示技术的发展方向之一, 具有低功耗、高分辨率、长寿命等特点. 我们课题组首次提出将二维材料石墨烯场效应晶体管与GaN micro-LED单片集成, 开辟了二维材料晶体管新的应用方向, 但是采用传统光刻工艺制备的集成器件, 受限于石墨烯场效应晶体管性能, 导致其对micro-LED的调控作用较差(具体工艺参见文献[5]). 采用传统紫外光刻胶接触石墨烯工艺制备的晶体管的跨导为0.0449 mS/mm, 最大载流子迁移率仅为469 cm2·V–1·s–1. 本文提出的新工艺经过分立的石墨烯场效应晶体管验证, 可以有效提升石墨烯晶体管性能, 因此下面将其应用到micro-LED/石墨烯场效应晶体管单片集成器件的制备工艺中. 集成器件由石墨烯晶体管串联一个micro-LED像素构成, 通过石墨烯晶体管对像素进行操纵和驱动, 等效电路图见图6(a). 在最后PMMA辅助转移石墨烯至GaN衬底上进行图形化的步骤中, 采用新工艺使用PMMA作为垫层进行光刻, 避免直接接触紫外光刻胶, 制备石墨烯场效应晶体管, 其沟道长度L为12 μm, 宽度W为480 μm, 源漏电压Vd为0.1 V, 栅介质为300 nm厚的二氧化硅, 单位面积栅介质电容Cg为1.15 × 10–4 F·m2. 对石墨烯晶体管和micro-LED这两个集成器件组成单元分别进行测试, 石墨烯场效应晶体管在室温下的转移和输出特性曲线如图6所示. 如图6(a)所示, 由于新工艺大大降低了紫外光刻胶引入的严重掺杂, 器件在–40—40 V范围内有出现狄拉克点的趋势, 跨导在Vg = 10 V处达到最大值0.1042 mS/mm, 相较于传统工艺(在Vg = 25 V处达到最大跨导仅为0.0449 mS/mm)得到大幅提升. 最大载流子迁移率由传统光刻工艺的469 cm2·V–1·s–1, 提升到了1087 cm2·V–1·s–1. 图 6 室温下石墨烯场晶体管的场效应特性曲线 (a)转移曲线(插图为集成器件等效电路图); (b)输出曲线 Figure6. Field effect characteristic curve of graphene transistor at room temperature: (a) Transfer curve (The insert show the equivalent circuit diagram of the integrated device); (b) output curve.
采用氧化铟锡作电流扩展层, 制作台面大小为50 μm × 30 μm的GaN micro-LED的开启电压相较于以前的5.8 V显著降低, I-V特性曲线如图7所示(插图为micro-LED电致发光的照片), 开启电压为2.8 V. 从图7可以看出, 该micro-LED在5 V的正向电压下工作电流高达为50 mA, 这是它高亮度的原因之一. 图 7 GaN micro-LED的I-V特性曲线(插图为5 V正向电压下的电致发光照片) Figure7.I-V characteristic curve of the GaN micro-LED (The insert shows the light emission photo under 5 V forward voltage).
最后对集成器件进行整体的测试, micro-LED与驱动晶体管串联外加5 V总电压, 栅极加–40, 0, 20和40 V的电压, 得到整体器件的I-V特性曲线, 如图8所示. 对比图8(a)和图8(b)可以发现在–40—40 V的栅压范围内, 采用新工艺后驱动器件对micro-LED的电流调控能力显著增强. 在外加电压为5 V时, Idmax和Idmin的差值达到了9.5 mA, 而石墨烯晶体管工艺优化前二者的差值不到0.1 mA, 可见工艺优化后的石墨烯场效应晶体管作为驱动元件控制micro-LED的能力大大提高. 将micro-LED的I-V特性和石墨烯晶体管的输出特性曲线绘制在一个图中, 可以确定集成器件的静态工作点(亦即交叉点), 如图9所示. 这幅图的物理意义是, 由于晶体管与micro-LED串联, 所以二者电流相等, 也就对应于图中的交叉点. 当调节栅压使晶体管电流变化时, 相应地也就等于调节了micro-LED的电流, 当电流调控范围足够大时, 也就可以控制micro-LED的开和关. 从图9可以看出, 伴随着Vg的增大, 工作点对应的Vs逐渐降低. 当Vg = 40 V时, 工作点的Vs接近于micro-LED的开启电压, 表明优化工艺后石墨烯晶体管的驱动能力大幅提升. 该器件有效实现了将micro-LED与其驱动电路单片集成, 免去了巨量转移. 当然, 目前只是原理上验证了用二维材料晶体管驱动micro-LED的可行性, 而实验中采用的晶体管尚不能完全关闭micro-LED. 将来采用有禁带的二硫化钼等二维半导体材料制备高开关比晶体管, 辅以高介电常数栅介质, 并设计更加完备的驱动电路, 不仅有开关功能, 还有信号补偿等功能, 届时此类集成器件将在全透明新型micro-LED显示技术中发挥重要作用. 图 8 (a)采用新工艺的集成器件I-V曲线; (b)传统光刻工艺集成器件的I-V曲线 Figure8.I-V characteristic curves of the integrated device: (a) Based on the new process; (b) based on traditional technology.
图 9 集成器件的工作机制(外加总电压固定为5 V, 交叉点为静态工作点) Figure9. Working mechanism of the integrated device (The total applied voltage is fixed at 5 V, and the crossing point is the static working point).