1.
Introduction

The continuous scaling down of transistors along with the demand for high-speed and low-power devices in both analog and digital circuits has resulted in the exploration of the bipolar junction transistor (BJT). They are predominantly used in analog and mixed-signal (digital as well as analog) circuits, primarily in high-frequency analog applications for wireless technology, as well as in integrated circuits requiring high precision, high power efficiency, and high speed^[1]. Due to its inherent well-controllable characteristics, high current gain (β), high cutoff frequency (f_T), and low output resistance (r_o). In addition to this, the realization of BiCMOS^{[2, 3]} technology facilitated the fabrication of BJT and CMOS on a single integrated chip termed as a system-on-chip (SoC). This BiCMOS technology has the potential to implement an SoC efficiently because it has superior AC/DC isolation, reduced crosstalk and substrate noise, and enhanced speed of operation due to the reduction in parasitic capacitances. However, the high emitter and base doping required in the BJT is associated with dopant fluctuations^{[4, 5]} and high thermal budgets, making its fabrication complex and expensive. Recently charge plasma-based, dopingless devices have drawn the attention of the research community since they offer a simple fabrication process flow by eradicating the intricate ion implantation procedures and high thermal budget required for annealing.



These devices are immune to process variation, random dopant fluctuations, and mobility degradation, and at the same time they require a lower thermal budget; this makes them cost effective^[6–10]. To combat all of these fabrication issues, using the charge plasma concept of the bipolar charge plasma transistor (BCPT) is explored. It shows a high current gain (β) and cutoff frequency (f_T), and therefore seems to be a viable option for analog applications^[11–14]. The charge plasma p-n junction^[10] has already been fabricated, and the above device shows compatibility with the BiCMOS process, thus making it suitable for fabrication. Moreover, another structural variant of the BJT is the heterojunction bipolar transistor (HBT), which provides a high current gain and cutoff frequency by introducing different semiconductor materials in base, collector, and emitter regions. This band gap engineering generates a field to assist the transport in the base region. Strained SiGe HBT is one device that uses strained SiGe in the base region^[15–17]. Due to the reduced band gap and increased mobility for SiGe, it also offers (with varying mole fraction of Ge) improved carrier transport properties, mainly a high field velocity. This is efficient for enhancing the speed of the device, which in turn improves the performance of the transistor drastically. This also increases the current gain and cutoff frequency of the device. There are limitations on the stability of the strained layer under a normal high thermal exposure process^[18], which is effectively eliminated in charge plasma technology. Since the BCPT has only recently been reported, analysis of the mole fraction variation of Si in Si_xGe_1?x must be analyzed. The amount of strain created in the semiconductor layer depends on the Ge mole fraction (the value of 1 ? x in Si_xGe_1?x is the mole fraction of Ge). Since the charge plasma concept has not been much explored, the analysis of its reliability aspects becomes vital for device performance estimation because temperature immensely effects the BJT's performance. This work investigates the strained BCPT through a calibrated 2D-TCAD simulation. The impact of this mole fraction variation on the performance metrics of the device is analyzed. The analysis demonstrates a fair device-level understanding, and exhibits the immense potential of the Si_xGe_1?x material as the device layer. In addition to this, although the BCPT demonstrated immense potential, the reliability issues faced in the conventional BJT should also be considered for this device since the BJT shows high temperature sensitivity. Statistical studies of the failure mechanism in the semiconductor device showed that thermal failure is the most frequent mode of failure^[19–23]. Furthermore, in this work, mixed-mode simulations were performed to realize inverting amplifiers by employing strained BCPT and BCPT devices. Both DC and transient analysis were performed for the devices. It was observed that there is an improvement in both switching on and off transient timings in the proposed device.



This paper is organized as follows: Section 2 describes the structure of the strained BCPT and the simulation framework used for analysis. Section 3 presents simulation results for the device performance metrics and shows the effect of using strained material on the temperature reliability of the proposed device. Section 4 deals with the mixed-mode simulation of the proposed strained BCPT. Finally, Section 5 draws important conclusions from this investigation.

2.
Device structure and simulation set-up

A schematic diagram of the conventional BCPT and proposed strained BCPT device structures are shown in Figs. 1(a) and 1(b), respectively. For the charge plasma concept realization, the work function of the metal electrodes needs to differ from that of the undoped Si or strained Si at least by 0.5 eV to induce the n⁺ or p⁺ region. For the formation of the n⁺ region in the emitter and collector, the work function of electrodes should be such that $phi_{
m MC}< chi_{
m Si}+(E_{
m g}/2q)$, where $chi_{
m Si}$ is the electron affinity, and $E_{
m g}$ is the band gap of the semiconductor material. The work function of the base needs to satisfy the condition $phi_{
m MB}>chi_{
m Si}+(E_{
m g}/2q)$ to form the p⁺ region^[6]. Here, the n⁺ emitter region is realized in both undoped Si and undoped strained Si by employing Hf as the emitter electrode metal. For inducing holes to create the base region, Pt is used; and to finally induce electrons to create the collector region, Al is deployed. The choice of metals for the electrode is such that a sufficient carrier concentration is maintained in the BCPT for all the considered Si mole fractions. To induce uniform carrier distribution throughout the active device's thickness, the semiconductor film thickness must be within the Debye length ($L_{
m D}$). The bias voltages are considered as $V_{
m BE}$ = 1 V and $V_{
m CE}$ = 1.1 V. The detailed simulation parameters considered are listed in Table 1.






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Figure1.
(Color online) Schematic diagrams of (a) conventional BCPT, and (b) proposed strained BCPT device.

Parameter	BCPT[11]	Strained BCPT
Device layer material	Si	SixGe1?x
Semiconductor film thickness (nm)	15	15
Buried oxide thickness (nm)	375	375
Top oxide thickness (nm)	5	5
Background doping (cm?3)	1013	1013
Doping	Undoped	Undoped
Emitter length (nm)	200	200
Base length (nm)	100	100
Collector length (nm)	400	400
Isolation between electrodes (nm)	100	100
Emitter electrode (eV)	3.9	3.9
Base electrode (eV)	5.65	5.65
Collector electrode (eV)	4.28	4.28

Table1.
Simulation parameters of the conventional BCPT and proposed strained BCPT.



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Parameter	BCPT[11]	Strained BCPT
Device layer material	Si	SixGe1?x
Semiconductor film thickness (nm)	15	15
Buried oxide thickness (nm)	375	375
Top oxide thickness (nm)	5	5
Background doping (cm?3)	1013	1013
Doping	Undoped	Undoped
Emitter length (nm)	200	200
Base length (nm)	100	100
Collector length (nm)	400	400
Isolation between electrodes (nm)	100	100
Emitter electrode (eV)	3.9	3.9
Base electrode (eV)	5.65	5.65
Collector electrode (eV)	4.28	4.28

In order to simulate the device's behavior, a 2-D Silvaco ATLAS TCAD simulator is used. The tool relates the electrostatic potential with the space charge density to solve Poisson's equation, continuity equations, and transport equations. The band gap narrowing model is used with default parameters. As stated in Ref. [11], standard thermionic emission models have been used for the emitter's contact with a surface recombination velocity of 2.2 × 10⁶ and 1.6 × 10⁶ cm/s for electrons and holes, respectively. A concentration-dependent mobility model is used for low electric field carrier mobility. High electric field velocity saturation is modeled through a field-dependent mobility model. For recombination the Shockley-Read-Hall recombination is used; it simulates the leakage current due to thermal generation with an intrinsic carrier life time of $tau_{
m nie}=tau_{
m nih}$ = 0.2 μm.



Auger recombination accounts for high-level injection effects are also used. In order to incorporate the screening effect of the inversion layer, the Shirahata mobility model is deployed. A Selberherr impact ionization model is invoked for BV_CEO calculations. The Fermi-Dirac distribution is used for carrier statistics, employing the Philips' unified mobility model and a doping-induced band gap narrowing model. The temperature analysis of this device for various temperatures is done by specifying the temperature statement in the model. The simulation model used for the analysis is calibrated against the model reported in Ref. [11], as shown in Fig. 2. For model validation all the dimensional and doping parameters are kept identical to the parameters in Ref. [11]. There is a good agreement that ensures the validity of the simulation framework.






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Figure2.
Calibration of I_C–V_BE characteristics of the BCPT^[11].

3.
Results and discussions

The thermal equilibrium hole and electron concentration are shown in Fig. 3(a) for different mole fractions of Si. It can be observed that the metal electrodes effectively induce n⁺ and p⁺ regions for all values of x, thereby realizing n-p-n transistor emitter, base, and collector regions on an undoped Si_xGe_1?x film. As the mole fraction of Ge increases, the band gap of Si_xGe_1?x decreases, and thus a greater number of majority carriers are available in the conduction band, effectively increasing the carrier concentration. Similarly, Fig. 3(b) demonstrates the electron concentration under the forward active state for different mole fractions of Si. Furthermore, the thermal equilibrium and forward active state energy band for the strained BCPT are illustrated in Figs. 4(a) and 4(b), respectively, for different mole fractions of Si. The base current versus base-emitter voltage plot for the strained BCPT with different mole fractions of Si is shown in Fig. 5(a), and the collector current versus base-emitter voltage is illustrated in Fig. 5(b).






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Figure3.
(Color online) (a) Electron and hole concentration of the strained BCPT (for different Si mole fractions) along the device's length with an X–X' cutline 1 nm below the semiconductor-SiO₂ interface under thermal equilibrium, and (b) electron concentration in the forward active state.






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Figure4.
(Color online) Energy band diagram of the strained BCPT (for different Si mole fractions) along the device's length with an X–X' cutline 1 nm below the semiconductor–SiO₂ interface under (a) thermal equilibrium and (b) the forward active state.






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Figure5.
(a) Base current versus base-to-emitter voltage characteristics of the strained BCPT for different values of mole fraction x, and (b) collector current versus base-to-emitter voltage characteristics of the strained BCPT for different values of the mole fraction.




It is clear from the plots that as the mole fraction of Si (x) decreases the leakage current floor gets elevated by two orders of magnitude. This high leakage current in the case of Si_0.2Ge_0.8 can be attributed to its lower band gap energy compared to Si (1.1 eV), which is also the reason for its higher collector current. Moreover, due to the reduced band gap and increased mobility of SiGe, it also offers (with varying mole fractions of Ge) improved carrier transport properties, mainly a high field velocity. In addition to this, the observed higher value of $I_{
m B}$ with decreasing Si mole fraction is also due to the surface accumulation layer transistor (SALTran) effect^{[24, 25]}.



In the strained BCPT there is a lightly doped emitter contacted with a metal whose work function is less than that of Si, resulting in a surface accumulation of electrons at the metal contact, as shown in Fig. 6, and this effect decreases with decreasing Si mole fraction. This accumulation of electrons results in an electric field since there is an electron concentration gradient from the metal-semiconductor interface toward the emitter-base junction. This field repels the minority holes injected from the base into the emitter, resulting in a reduced hole concentration gradient in the emitter region. Subsequently, there is a reduction in the base current for higher Si content. The output characteristics of the strained BCPT for x = 1, x = 0.5, and x = 0 are shown in Figs. 7(a), 7(b), and 7(c), respectively. This also advocates the enhancement of current levels with straining. However, it is worth mentioning here that both currents decrease with the increase in the Si mole fraction, but the decrease in $I_{
m B}$ is more prominent, and thus there is a significant improvement in the current gain, as depicted in Fig. 8(a). This demonstrates that the Si mole fraction has the potential to control the currents in strained BCPT. Thus, by appropriately choosing the mole fraction, the strained BCPT characteristics can be effectively controlled.






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Figure6.
Electron concentration in the emitter region of the proposed strained BCPT structure for different values of x.






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Figure7.
Output characteristics of the strained BCPT for (a) x = 1 (Si), (b) x = 0.5 (SiGe), and (c) x = 0 (Ge).






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Figure8.
(a) Current gain versus collector current characteristics of the strained BCPT for different values of mole fraction x, and (b) cutoff frequency versus collector current characteristics of the strained-BCPT for different values of the mole fraction at V_CE = 1 V.




The current gain for the strained BCPT is approximately 15× that of the conventional BCPT, i.e. it is 67 943 for the strained BCPT for x = 0.5 and 4532 for the conventional BCPT case. Furthermore, Fig. 8(b) illustrates the variation in the cutoff frequency of the strained BCPT with respect to the collector current for different values of x. It shows that the cutoff frequency f_T of the BCPT is reported as 3.7 GHz^[11] and whereas it is 9 GHz for the strained BCPT. The simulation results show that the speed of the strained BCPT is much higher than that of the conventional BCPT. Moreover, since the strained BCPT has a larger current gain, it is expected to exhibit a lower collector breakdown voltage BV_CEO compared to the conventional BCPT.

3.1
Impact of interface trapped charges on device current gain

The key attribute of the BCPT structure is the low work function metal electrode deployed at the emitter contact, resulting in a metal-semiconductor junction (Hf-Si). Thus, the surface preparation process and metal deposition methods govern the possibility of traps at the metal-semiconductor interface. There is lattice discontinuity, dangling bonds, and inter-diffusion. Thus, these traps have the potential to alter the SALTran effect, thereby effecting the crucial device parameters. Hence, it is mandatory to study the impact of interface trapped charges on device performance. To investigate this, we consider a typical range of interface traps that may be present at the interface. In the simulations, both the acceptor and donor types of traps are introduced with the trap energy level (E.level) at 0.49 eV from the conduction (or valance) band. The degeneracy factor for the trap level is 12, and the capture cross sections for electrons (sign) and holes (sigp) are considered as 2.85 × 10^?15 and 2.85 × 10^?14 cm^?2, respectively. The peak current gain reduces significantly when the trap density of the acceptor and donor type of interface traps increases at the interface, as shown in Fig. 9. Simulation results validate the significant degradation in the current gain due to trapped charges, which is in accordance with Ref. [35].






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Figure9.
(Color online) Average current gain versus trap density of the proposed strained BCPT structure for different values of x.

3.2
Analysis of device temperature reliability

In the conventional BJT, hot carrier-induced degradation of the current gain is mainly attributed to the hot carrier-induced generation of interface traps and damage of the oxide-Si interface near the base-emitter junction^[26–29]. Statistical study of the failure mechanism in the semiconductor device shows that thermal failure is the most frequent type of failure.



Thermal runaway is an uncontrolled positive feedback mechanism that leads to device failure. If the gain of the device increases with increasing temperature and also with increasing current, then thermal runaway can occur. Thus, analyzing the temperature reliability of the proposed structure is essential for device performance estimation. Hence, the temperature effect on the BJT current components can be generalized as

${I_{ m{C}}} = frac{{Aq{D_{ m{n}}}(T){n_{ m{i}}}{{(T)}^2}}}{{{Q_{ m{B}}}}}exp frac{{q{V_{{ m{BE}}}}}}{{kT}},$

(1)

${I_{ m{B}}} = frac{{Aq{D_{ m{p}}}(T){n_{ m{i}}}{{(T)}^2}}}{{{Q_{ m{E}}}}}exp frac{{q{V_{{ m{BE}}}}}}{{kT}}.$

(2)

Here, A is the emitter area, $D_{
m n}$ and $D_{
m p}$ are diffusion constants for electrons and holes, respectively, $n_{
m i}$ is the intrinsic carrier concentration, and $Q_{
m B}$ and $Q_{
m E}$ are base and emitter Gummel numbers, respectively^[28–32]. With an increase in temperature, both base and collector currents increase, as demonstrated by the above equations. This is also proved by the base current versus base-to-emitter voltage characteristics of the strained BCPT for x = 1, x = 0.5, and x = 0 at different temperatures (Fig. 10). The collector current versus base-to-emitter voltage characteristics of the strained BCPT for x = 1, x = 0.5, and x = 0 at different operating temperatures are illustrated in Fig. 11. It is noteworthy that the leakage floor is also magnificently increasing with the temperature.






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Figure10.
Base current versus base-to-emitter voltage characteristics of the strained BCPT for (a) x = 1 (Si), (b) x = 0.5 (SiGe), and (c) x = 0 (Ge) at different temperatures.






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Figure11.
Collector current versus base-to-emitter voltage characteristics of the strained BCPT for (a) x = 1 (Si), (b) x = 0.5 (SiGe), and (c) x = 0 (Ge) by varying operating temperature.

4.
Mixed-mode analysis of the proposed strained BCPT device

In order to analyze the circuit-level performance of the proposed strained BCPT, a 2-D mixed-mode Atlas simulator^{[33, 34]} is used. Here, we realize inverting amplifiers based on the strained BCPT and conventional BCPT, as shown in Fig. 12(a). Both DC and transient analysis are performed here for both devices. In the DC analysis, for a linearly varying input voltage, an output voltage showing a transition from “1” to “0” is clearly obtained, as shown in Fig. 12(b).






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Figure12.
(Color online) (a) Strained BCPT-based inverting amplifier, and (b) DC analysis for VTC.




The transient analysis of both devices is illustrated in Fig. 13. Brief perusal of the transient characteristics of the devices demonstrates that the switching on delay of the conventional BCPT and proposed strained BCPT with mole fraction x equal to 0.5 are 52 and 33 ps, respectively. Similarly, the switching off delay of the conventional BCPT and the proposed strained BCPT devices are 31 and 19 ps, respectively. The improvement in the switching on and switching off transitions of the proposed device can be attributed to the enhanced mobility of charge carriers with straining.






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Figure13.
(Color online) Transient analysis of the strained BCPT (x = 0.5)-based inverting amplifier and BCPT structure.

5.
Conclusion

In this manuscript, a strained BCPT with a strained Si-SiGe layer is investigated. In the proposed device, the emitter, base, and collector regions are realized by inducing n⁺ and p⁺ type plasma by using metals with different work functions. The impact of the Si mole fraction x in Si_xGe_1?x on the device performance is analyzed using a calibrated 2-D TCAD simulation. This analysis demonstrates the band gap lowering with an increased Ge content or effective strain on the Si layer, and its implications. As the mole fraction of Si decreases, the band gap of Si_xGe_1?x decreases; thus, a greater number of majority carriers are available in the conduction band, effectively increasing the carrier concentration, which in turn results in enhanced drive current and gain. The proposed device also retains the inherent advantages of a charge plasma structure, such as high current gain, immunity to high temperature and ion implantation issues of conventional doped transistors, etc. The simulation study reports a significant improvement in current gain and cutoff frequency, and a lower BV_CEO for the proposed structure over the conventional device. Using calibrated 2-D mixed-mode simulations, inverting amplifiers based on the conventional and proposed devices are realized. A significant improvement of 37% in the switching on transient time and 39% in the switching off transient time are achieved by straining the device with a mole faction x of 0.5. The analysis demonstrates an immense potential of the Si_xGe_1?x material as a device layer.

Acknowledgments

I am thankful to the PDPM Indian Institute of Information Technology, Design and Manufacturing, Jabalpur for providing infrastructure facilities.