Fund Project:Project supported by the Young Scientists Fund of the National Natural Science Foundation of China (Grant No. 61704010) and the Natural Science Foundation of Shaanxi Province, China (Grant No. 2020JM-238).
Received Date:05 February 2021
Accepted Date:02 March 2021
Available Online:25 August 2021
Published Online:05 September 2021
Abstract:The neural network under the current computer architecture is difficult to process complex data efficiently, thus becoming one of the bottlenecks restricting the development of artificial intelligence technology. The human brain has the characteristics of high efficiency, low power consumption and integration of memory and computing, and is regarded as a most potential computing system to break the traditional von Neumann computing system. Synaptic biomimetic device is to realize the neural mimicry of human brain from the hardware level. It can simulate the information processing mode of brain nerve, that is, the process of “memory” and “calculation” can be realized on the same device, which is of great significance in building a new computing system. In recent years, the fabrication of memristor materials for bio-mimetic synaptic devices has made progress, but most of them focus on the simulation of synaptic function. The key research of pulse signal perception and information transmission is relatively lacking. In this paper, an bi-layer memristor with structure Al/nc-Al AlN/A2O3/Ag is fabricated by rf sputtering method to realize the basic functions of bionic synaptic devices. It is found that this bio-mimetic memristor exhibits bipolar switching property which is the basic condition to produce memristor based neural synapse. Both of PPF and PPD process can be observed and there will be no firing signal observed if the pulse interval is as large as 350 ms. The change of device conductance should be related to pulse voltage, frequency and pulse number applied. The larger pulse voltage, frequency and number will cause device conductance to increase sharply in both positive and negative pulse voltage region. The STDP measurement is executed with different sequence pulses from post and previous neuron separately. If the pulse of previous synapse comes in front of pulse from post synapse, the conductance will increase, which is so-called LTP process. If the pulse of previous neuron comes behind of pulse from post neuron, the conductance will be reduced as well. Triplet STDP measurement is executed with at least three pulses from previous and post neuron at the meanwhile. It is concluded that if the interval time of the first two pulses is fixed, the device conductance more depends on the value of the second and third pulse interval. Ebbinghaus forgetting curve can be used to explain the reason why the device conductance declines with time going by. The stability study of this memristor includes endurance and retention properties at both room and high temperature. It is found this biomimetic memristor can maintain its conductance for over 115.7 days at 85 ℃, which is long enough for current neural network design. Keywords:bi-layer memristor/ neural network/ spiking time dependent plasticity/ spatiotemporal signal processing
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3.1.短时程突触可塑性
脑神经大多以脉冲波的形式进行信息传递, 只有当前神经元的信号到达一定强度才会引起神经突触感知并传递到下一神经元, 强度较小的脉冲则视为噪声信息. 仿生忆阻器的脉冲测试如图2所示, 当输入信号为一个幅值2 V、宽度1 ms的脉冲波时, 器件内EPSC约为0.42 μA, 若间隔5 ms再施加一次脉冲, 则会引起双脉冲易化(paired-pulse facilitation, PPF)现象, 即第二个脉冲引起的EPSC要高于第一个脉冲达到0.73 μA. 这种现象通常被认为是第一个神经刺激信号产生时人体细胞内残留的钙离子会导致第二次神经刺激信号时突触小泡的额外释放[9,32]. 应用时可以设定只有超过阈值的EPSC才会形成有效输出, 即信息才能从前神经元通过神经突触传递至后神经元, 这能够排除信息传递中的干扰因素, 更贴近神经系统的工作方式. 若将两个脉冲的间隔增加到350 ms, 器件内可以探测到两个幅值约为0.4 μA的EPSC, 但是没有观测到PPF现象, 无法形成有效输出. 这说明当脉冲幅值固定时, PPF现象更依赖脉冲频率而发生, 频率过低的脉冲信号也很难在器件内引起强EPSC形成有效输出. 图2(d)—图2(f)施加了同样的负向脉冲电压, 器件显示出双脉冲抑制现象(paired-pulse depression, PPD). 在生物学上PPD通常被认为是具有电压依赖性的钙离子通道失活, 或是由于积累在突触前神经元的神经递质囊泡的暂时耗尽造成的. 仿生忆阻器的PPF/PPD可通过控制正负脉冲电压及频率来实现. 易化比和抑制比指的是第一个脉冲产生的幅值A1和第二个脉冲幅值A2的关系$\dfrac{{{A_2} - {A_1}}}{{{A_1}}} \times 100 \% $, 通常与脉冲频率有关, 过大的脉冲间隔无法实现双脉冲易化或抑制[31]. 图 2 器件内EPSC和IPSC的脉冲测 (a) 施加单个正向脉冲的EPSC; (b) 双脉冲易化的EPSC; (c) 施加双正向脉冲但间隔时间350 ms的EPSC; (d) 施加单个负向脉冲的IPSC; (e) 双脉冲抑制的IPSC; (f) 施加双负向脉冲但间隔时间350 ms的IPSC Figure2. Pulse voltage measurement of memristor: (a) EPSC with single positive pulse applied; (b) EPSC of PPF; (c) two positive pulses applied with 350 ms interval; (d) EPSC with single negative pulse applied; (e) IPSC of PPD; (f) two negative pulses applied with 350 ms interval.
在明确双脉冲易化和抑制特性后, 将双脉冲信号改为连续脉冲信号同时测试器件权值, 结果如图3(a)—(c)所示. 用器件权值可以更直观地表达忆阻器工作状态. 实验发现, 频率为100 Hz连续的正向脉冲可以引起器件权值的增加, 这与之前图1(d)连续正向电压扫描使器件电导率增加的结果相符. 若施加频率100 Hz连续的负向脉冲, 会导致器件内银离子向相反方向迁移, 引起器件权值的减少. 这与图1(e)中连续负向电压扫描降低器件权值的结果一致. 当连续施加频率为2 Hz的正向脉冲时, 器件权值依旧缓慢减少, 如图3(c)所示. 这是由于频率较低的正向脉冲无法引起器件内活跃离子的持续累积, 器件权值也会随时间流逝而降低. 因此只有持续施加高频率的脉冲波, 才可获得持续增强的器件权值. 时空信息传递中核心的一部分, 即是对信号频率的响应. 相比与信号幅值, 仿生忆阻器受信号频率影响更为深远, 这一特性也符合神经系统传递时空信息的基本特性. 图 3 (a) 以100 Hz频率施加幅值和宽度为2 V和5 ms的正向脉冲, 器件权值随时间增加; (b) 以100 Hz频率施加幅值和宽度为–2 V和5 ms的负向脉冲, 器件权值随时间减小; (c) 以2 Hz频率施加幅值和宽度为2 V和5 ms的正向脉冲, 器件权值也会随时间减小 Figure3. (a) Device conductance increased with 100 Hz, 2 V in amplitude and 5 ms in width positive voltage pulse applied; (b) device conductance decreased with 100 Hz, -2 V in amplitude and 5 ms in width positive voltage pulse applied; (c) device conductance will decrease with 2 Hz, 2 V in amplitude and 5 ms in width positive voltage pulse applied.
23.2.长时程突触可塑性 -->
3.2.长时程突触可塑性
改变连续施加的脉冲电压幅值、频率和数量, 会对器件权值的增加幅度产生不同的影响, 具体关系如图4(a)和图4(b)所示. 固定脉冲间隔, 当施加的脉冲数量增加时器件权值会相应增加; 而固定施加脉冲的数量, 更小的脉冲间隔可以使器件权值急剧增加. 若设定器件权值1为最大值, 器件达到最大权值所需的脉冲个数也与脉冲幅值和间隔有关. 脉冲间隔越小、幅值越大时器件达到最大权值所需的脉冲数量越少, 如图4(b)所示. 器件权值的减少也有对应的特性, 即负向脉冲幅值和频率的增加, 也会引起器件权值迅速降低. 在明确器件的PPF和PPD特性后, 脉冲时间依赖突触可塑性(spiking time dependent plasticity, STDP)机制也是神经突触的重要特性, 它是指当前神经元脉冲先于后神经元发生时, 突触权值应加强; 当后神经元脉冲先于前神经元发生时, 突触权值应减小[33]. 将仿生忆阻器的上下电极视为接受前后神经元信息的连接部分, 分别对两极施加不同时序的脉冲信号, 测量到器件STDP特性如图4(c)所示. 当前神经元信号先于后神经元信号发生时器件权值增加(long term potentiation, LTP), 并且相隔时间越短增加幅度越大; 当后神经元信号先于前神经元信号发生时器件权值减小(long term depression, LTD). 权值的增加和减少应符合指数函数分布. 图 4 (a) 器件权值与施加脉冲数量和脉冲间隔的关系; (b) 器件达到最大权值所需脉冲数量与脉冲电压和间隔的关系; (c) STDP特性 Figure4. (a) The relationship of device conductance with pulse number and interval; (b) the pulse number needed to make device conductance maximized with different pulse voltage and interval; (c) STDP.
其中G0和Gt为器件权值, 对应记忆的初始状态和随时间变化的状态; t为时间; τ为弛豫时间系数; β应在0和1之间变化. 突触仿生忆阻器的权值保持规律也应符合Ebbinghaus遗忘曲线, 这是检验器件稳定性的重要依据. 如果没有持续的强脉冲(高幅值和高频率脉冲)施加, 器件权值会随时间推移而减少, 正如人的记忆也会随时间流逝而衰退一样. 另外, 实验发现突触仿生忆阻器的遗忘特性还与之前所受的脉冲刺激, 即感应过程所受脉冲刺激的强弱相关. 分别对忆阻器施加幅值和宽度为1.2 V和5 ms的不同数量的脉冲电压, 其遗忘曲线如图6所示. 对器件施加10个脉冲后立即停止并开始测试器件权值变化, 随着时间流逝器件权值会从最初的最大值有一个明显降低, 这意味着短时记忆的持续时间相当短暂, 当测试时间达到60 s以上器件最终权值保持在0.24左右; 若增加脉冲数量至50, 100和200个, 器件的遗忘曲线衰退趋势明显变缓. 对四种情况的遗忘曲线进行指数拟合, 对应的弛豫时间系数从施加10个脉冲的1.6 s逐渐增加到4.8, 11.1 和21.0 s, β=1, 器件最终权值也从0.24增加至0.7, 形成了更稳定的长时记忆. 由此可知, 当脉冲幅值和宽度固定时, 前期施加的脉冲刺激数量越多, 造成器件“遗忘”前的“记忆存储”越高, 器件衰退过程越缓慢, 最终的权值保持也越高. 图 6 分别施加10个(a), 50个(b), 100个(c)和200个(d) 幅值为1.2 V、宽度为5 ms的脉冲电压后器件权值随时间减弱的特性 Figure6. The device conductance changed with time after applied (a) 10, (b) 50, (c) 100 and (d) 200 positive voltage pulses with the amplitude of 1.2 V and pulse width of 5 ms.
将器件最终权值、弛豫时间系数与脉冲数量、幅值的关系总结如图7所示. 当脉冲电压幅值和宽度固定时, 施加越多的脉冲数量可以引起较高的最终权值和较长的弛豫时间如图7(a)和图7(b)所示, 这说明经历过长时间脉冲刺激的器件, 可以在长时间内保持较高的器件权值, 这与人类经历了深刻学习也会保持较长记忆时间相符. 若增加前期刺激的脉冲电压幅值, 器件弛豫时间也会增长如图7(c)所示. 通过研究器件权值在达到最大值后随时间流逝的测试, 可以更准确地掌握器件遗忘机制, 确定所需的权值保持时间. 图 7 (a) 器件最终权值与施加脉冲数量的关系; (b) 器件弛豫时间与施加脉冲数量的关系; (c) 器件弛豫时间与施加脉冲电压的关系 Figure7. (a) The relationship between device conductance and applied pulse number; (b) the relationship between device relaxation time and applied pulse number; (c) the relationship between device relaxation time and applied pulse voltage.
23.4.稳定性 -->
3.4.稳定性
器件稳定性的测试包括循环测试、耐久测试和高温测试, 测试结果如图8所示. 在图8(a)中施加幅值为2 V、宽度为5 ms的脉冲电压, 第一次达到器件权值最大仅需要13个脉冲, 之后将器件静置10 min开始第二次测试. 发现第二次测试仅需要6个脉冲就可使器件权值达到最大值. 依次循环施加脉冲发现, 在第6次测试之初器件权值已经保持在最大值附近, 这说明器件已接受足够强烈的刺激形成稳定“记忆”, 10 min时间不足以使器件权值发生明显减弱. 图8(a)所示结果符合突触仿生忆阻器的“经验式学习”特性, 即器件在经历相同刺激时, 下一次的学习时间要短于上一次的学习时间. 器件耐久测试在室温和50 ℃条件下进行, 结果如图8(b)所示. 在施加1000次脉冲确保器件经历足够强度刺激后, 将器件在室温和50 ℃下静置2 × 104 s以上, 发现室温时器件权值保持状态良好, 但50 ℃条件下器件权值有明显下降, 可见温度还是会对器件权值保持时间产生影响. 设定器件权值下降30%的时间为器件能够存储记忆的保持时间, 并将测试温度提高到175, 200, 225和250 ℃, 器件在高温下的保持时间如图8(c)所示. 进行线性拟合后发现在85 ℃时器件权值的保持时间大约为115.7 d. 这一保持时间基本满足电路设计要求, 但突触仿生忆阻器的权值保持时间还应视具体应用而定. 图 8 (a) 循环测试; (b) 耐久测试; (c) 175, 200, 225和250 ℃高温测试 Figure8. (a) Duration study; (b) retention study at room and 50 ℃ temperature; (c) device failure time at high temperature 175, 200, 225 and 250 ℃.