1.
Introduction

Silicon interposers have been widely adopted in 2.5D and 3-D integration for interconnecting integrated circuits (ICs) to print circuit boards^[1]. However, the silicon interposer faces several challenges, such as high frequency transmission loss induced by semi conductive silicon substrates^{[2, 3]} and high fabrication cost due to limited wafer size (< 300 mm)^{[4, 5]}. To address these issues, a glass interposer with through glass vias (TGVs) has been proposed.



In comparison with the silicon interposer, glass provides lower electrical loss and high thermal stability^[6]. Moreover, the glass interposer can be fabricated using low-cost panel processes and a dielectric is not needed between the copper via and substrate for electrical isolation. These advantages make the glass interposer a promising alternative to its silicon counterpart and attract more attention from industry and academics. Sukumaran et al. presented the design, fabrication, and electrical characterization of small through glass vias in the glass^[7]. Based on cylindrical mode expansion approaches, Li et al. proposed an accurate wideband model to analyze the electrical properties of high density TGV arrays^[8]. Cho et al. investigated the effect of TGVs on the thermal performance of the glass interposer^[9]. In addition to serving as electrical and heat transfer paths, the TGVs can also be designed as ratio-frequency (RF) passive devices. Hsieh et al.^[10] and Kim et al.^[11] fabricated and measured through glass vias-based RF inductors, respectively. The impact of the turn number on the quality factor performance and inductance density was characterized in Ref. [11]. However, fewer researches have addressed the applications of 3-D inductors in RF circuit design.



This study analyzes the basic operating principle of Wilkinson power dividers and derives the parameter values of each lumped component. Using TGV inductors and parallel plate capacitors, a TGV based 3-D Wilkinson power divider is designed and compared.

2.
Theoretical analysis

Fig. 1 shows the equivalent circuit of a lumped-type Wilkinson power divider, which consists of two identical inductors L, a ground capacitor C₁, an isolation resistor Z_c, and a bridging capacitor C_2.Port 1 is the input terminal and ports 2 and port 3 are the output terminals. For electrical isolation, the isolation resistance is twice the terminal impedance Z₀. In the proposed two-way power divider, the scattering parameters of the three ports should be satisfied as Eq. (1)^[12–14]. Here reflection coefficient S₁₁, S₂₂, and S₃₃ describe how much power is reflected from the load. Insertion loss S₂₁ and S₃₁ represent signal attenuation as it passes through a power divider, which are two important figures of merit for the electrical power divider. Isolation coefficients S₂₃ and S₃₂indicate the isolation degree between the two output ports,

${S_{11}} = {S_{22}} = {S_{33}},;{left| {{S_{21}}} ight|^2} = {left| {{S_{31}}} ight|^2} = {1 /2},;{S_{23}} = {S_{32}} = 0.$

(1)

To investigate the operation characterization of the power divider, the odd-even mode analysis method is performed^[15]. In the even-mode excitation case, port 2 and port 3 are loaded with voltage signals with identical voltage amplitude and phase. Therefore, there is no current flowing through the capacitor C₂ and the resistor Z_c. The equivalent circuit of the power divider can be divided into two symmetrical parts, as shown in Fig. 2(a). The equivalent input impedance of port 2 can be written as,

$begin{aligned} Z_ { m{in}}^{ m e} &= left( {2{Z_0}parallel frac{1}{{{{jomega {C_1}} / 2}}}} ight) + jomega L & = frac{{2{Z_0} - {omega ^2}L{C_1}{Z_0} + jomega L}}{{jomega {C_1}{Z_0} + 1}} . end{aligned}$

(2)

For impedance matching, the equivalent input impedance of port 2 should be satisfied as follows,

$Z_ { m{in}}^{ m e} = {Z_0},$

(3)

where ω is the central angular frequency. Based on Eqs. (2) and (3), the parameter values of C₁ and L can be obtained as,

${C_1} = frac{1}{{omega {Z_0}}},$

(4)

$L = frac{{{Z_0}}}{omega }.$

(5)

In odd-mode excitation, port 2 and port 3 are loaded with voltage signals with identical voltage amplitude and opposite phase. The equivalent bridging capacitance between the two terminals is 2C₂ and the equivalent circuit of the power divider can be represented as Fig. 2(b). In the excitation mode, the equivalent input impedance of port 2 can be written as,

$begin{aligned}Z_ { m{in}}^{ m o} &= jomega Lparallel frac{1}{{jomega 2{C_2}}}parallel {Z_0} & = frac{{jomega L{Z_0}}}{{{Z_0} - 2{omega ^2}L{C_2}{Z_0} + jomega L}}. end{aligned} $

(6)

For impedance matching, the equivalent input impedance of port 2 also should be satisfied as follows,

$Z_ { m{in}}^{ m o} = {Z_0}.$

(7)

Based on Eqs. (6) and (7), the parameter value of C₂ can be obtained,

${C_2} = frac{1}{{2{omega ^2}L}} = frac{1}{{2omega {Z_0}}}.$

(8)

Based on the above conditions, the input impedance of port 1 is derived to verify the matching characteristics of the power divider. For the proposed power divider shown in Fig. 1, the two output paths are completely symmetrical. When port 1 is loaded with an excitation, there is no current flowing through the bridging capacitor C₂ and isolation resistor Z_c. The equivalent circuit of the power divided then can be simplified as Fig. 2(c) and the equivalent input impedance of port 1 is written as,






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Figure2.
Equivalent circuit of the power divider at (a) even-mode excitation, (b) odd-mode excitation, (c) port 1 loaded with an excitation.

${Z_ { m{in}}} = frac{1}{{jomega {C_1}}}parallel left( {jomega L + {Z_0}} ight)parallel left( {jomega L + {Z_0}} ight).$

(9)

Substituting Eqs. (4) and (5) into Eq. (9), the equation can be further simplified as,

${Z_ { m{in}}} = frac{{{Z_0}}}{j}parallel left( {j{Z_0} + {Z_0}} ight)parallel left( {jL + {Z_0}} ight) = {Z_0}.$

(10)

The results indicate that the three ports are matched and the component values derived from Eqs. (4), (5), and (8) can be used for the design of the proposed power divider.

3.
A design example

Now, a practical design example of the Wilkinson power divider is studied in the section. Specifications required for the power divider are as follows: the power divider should have a center frequency of 2.95 GHz with an operating bandwidth of at least 300 MHz. The insertion loss is less than 3.5 dB, the return loss is greater than 15 dB and the port isolation is greater than 15 dB. Additionally, the phase imbalance is less than 1°, and the characteristic impedance Z₀ is 50 Ω. The relative dielectric constant and loss tangent of the glass interposer are 5.5 and 0.006, respectively. The electrical conductivity of filled copper is 5.8 × 10⁷ S/m.



Based on the above specification and Eqs. (4), (5), and (8), the parameter values for the lumped components in Fig. 1 can be obtained as L= 2.69 nH, C₁= 1.08 pF, and C₂= 0.54 pF. These parameters are then entered into the equivalent circuit shown in Fig. 1 and simulated with an Advanced Design System (ADS) simulator^[16]. The simulated results shown in Fig. 3 demonstrate that the power divider meets all the design specifications.






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Figure3.
(Color online) S parameters of the proposed power divider obtained with ADS simulator.






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Figure1.
Equivalent circuit of a lumped type Wilkinson power divider.




After determining the parameter values of each component, the equivalent circuit is converted into a three-dimensional layout, as shown in Fig. 4. Herein the inductors in the power divider are implemented by TGV inductors. The inductance density of TGV inductors achieves 21.3 nH/mm², which offers a 4× improvement over a conventional lateral inductor with micro-strip line technology^[17]. The capacitors are formed by traditional parallel plate structures and the dielectric between the two plates is silicon dioxide with a thickness of 0.5 μm. The isolation resistor is realized by a thin film resistor. The dimensions of each component are shown in Table 1. The resulting 3-D Wilkinson power has an oversize of 0.6 × 1.1 × 0.2 mm³. Moreover, taking into account that the inductance of the 3-D inductor would significantly affect the power divider performance, an effective method of changing the turn number is proposed to tune the inductance accuracy of the 3-D TGV inductor in the proposed power divider design.






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Figure4.
(Color online) Layout of the proposed Wilkinson power divider.

Component	Size (μm3)
C1	190 × 80 × 10.5
C2	95 × 80 × 10.5
Zc	300 × 200 × 80
L	230 × 550 × 165

Table1.
Physical dimensions of each component.



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Component	Size (μm3)
C1	190 × 80 × 10.5
C2	95 × 80 × 10.5
Zc	300 × 200 × 80
L	230 × 550 × 165

The frequency response of the proposed 3-D power divider obtained with commercial full-wave electromagnetic simulator HFSS^[18] is shown in Fig. 5, which shows that the power divider meets all the design specifications. The centre frequency (f₀) is 2.95 GHz with a fractional bandwidth (FBW) of 10.51%. The insertion loss S₂₁ is less than 3.2 dB over the operating bandwidth. The return loss S₁₁ is greater than 36 dB and the isolation S₂₃ is greater than 40 dB. Additionally, the phase difference between the two output ports is within 0.2°. Compared with the circuit simulator, the deviation of S-parameters is probably caused by parasitic parameters in the glass interposer and interconnects.






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Figure5.
(Color online) (a) S parameters of the proposed power divider obtained with HFSS simulator. (b) Phase difference between the output ports obtained with ADS and HFSS simulator.




Table 2 compares the electrical performance of the proposed 3-D power divider with some reported technologies. In comparison with the power dividers with a micro-strip line^{[17, 18]}, and LTCC^{[19, 20]} technologies, it can be seen that the proposed 3-D power divider has the noticeable advantages of a more compact size. This is attributed to the fact that the size of power divider based on the transmission line structure is usually multiples of the quarter-wavelength. Moreover, the proposed one-section power divider provides a comparable fractional bandwidth (FBW) with the others. Considering that the fractional bandwidth of power dividers is mainly determined by the centre frequency and section number (N)^[14], increasing the section number is an effective method for a higher FBW.

Ref	[19]	[20]	[21]	[22]	This work
Process	Micro-strip		LTCC		TGV
FBW (%)	100	5	13	180	10.51
N	2	1	1	7	1
f0 (GHz)	1	2	3.7	2 – 38	2.95
S11 (dB)	38	30	15	16	42
S21 (dB)	6.45	6.4	4.45	4.3	3.1
S32 (dB)	32	15	33	17	58
Size (mm2)	10.2 × 5.8	48 × 36.9	3.55 × 3.18	4 × 4	0.6 × 1.1

Table2.
Performance comparison with some reported power dividers.



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Ref	[19]	[20]	[21]	[22]	This work
Process	Micro-strip		LTCC		TGV
FBW (%)	100	5	13	180	10.51
N	2	1	1	7	1
f0 (GHz)	1	2	3.7	2 – 38	2.95
S11 (dB)	38	30	15	16	42
S21 (dB)	6.45	6.4	4.45	4.3	3.1
S32 (dB)	32	15	33	17	58
Size (mm2)	10.2 × 5.8	48 × 36.9	3.55 × 3.18	4 × 4	0.6 × 1.1

4.
Conclusion

Based on the basic operating principle of power dividers, this study designs a lumped-type 3-D Wilkinson power divider. The inductors, capacitors and isolation resistor are formed by 3-D TGV inductors, parallel-plate structures, and thin-film resistor, respectively. Results show that the proposed power divider has a more compact size in comparison with some reported technologies and exhibits excellent frequency characteristics. Such a power divider is an ideal RF passive device and can be easily integrated into packages for miniaturized?wireless communication?system applications.