1.
Introduction
As the size of complementary metal–oxide–semiconductor (CMOS) devices continues to shrink, problems such as high power and low reliability are prone to occur, compelling scientists to discover and research new alternatives. Quantum-dot cellular automata (QCA), which was proposed by Lent et al.[1], is an important potential candidate for alternative CMOS technology, providing a new way of encoding, processing, and transmitting binary information.
In QCA, the information is passed and converted through the Columbic interaction between the elementary elements (called cells), rather than the current in the CMOS circuits[2]. Two quantum-dots are arranged in a cell to compute the binary information, one is a 90° normal cell, the other is a 45° rotated cell. The rotated cell in all respects is no different from standard cells, except for the 45°[3]. In QCA circuits, the three-input majority gate, wire, and inverter are the most important logic primitives[4]. In QCA circuit design, line crossover, multilayer, and coplanar technologies are often used widely and play a crucial role.
Circuit reliability is increasingly becoming an important consideration in advanced logic circuits design[5]. QCA circuits usually have a high failure rate[6]. In QCA, cell omission defects are often considered the most common problem. Since the majority gate is a very important component in QCA circuits, it is of great significance to construct a majority gate with fault-tolerant characteristics.
A few works on fault-tolerant design of QCA logic gates have been proposed in recent years. A majority gate based on 3 × 5 tiles can achieve 60% fault-tolerance under single cell missing defects[11]. A mixed structure consisting of rotated cells and normal cells has at least 75% fault tolerance[2, 5]. The emergence of fault-tolerant gates provides a solid foundation for the stability design of QCA circuits.
The main idea of this paper is to design and analyze a new three-input majority gate with high fault-tolerance in single-cell and double-cell omission defects. Besides, a new fault-tolerant 2-4 decoder circuit is proposed based on the majority gate. The function of the design is verified by the physical proof and the simulation results of QCADesigner. In addition, on the basis of the 2-4 decoder, a new fault-tolerant 3-8 decoder is also implemented.
2.
Basics of QCA
QCA cells are the basic units of the QCA circuit. It is square and consists of four quantum-dots and two free nanoscale electrons. The basic principle of the operation is based on quantum mechanical effects and charge quantization[1]. When the barriers between electrons remain relatively low, they can be tunneling among quantum dots. Due to Coulomb repulsion, electrons take over two vertices of the cell. Therefore, the four quantum-dots in each cell have two stable arrangements, often denoted as cell polarization, which can be used to encode binary information. Fig. 1(a) shows QCA cells with p = +1 and p = ?1. These two polarization levels are used to indicate logic 1 and 0 respectively.
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Figure1.
(a) QCA cells with different polarization values. (b) The three-input majority gate. (c) Inverter gates.
The three-input majority gate and the inverter are the fundamental devices of QCA circuits. The layouts of them are shown in Figs. 1(b) and 1(c), respectively. As a majority gate, the polarization value of the intermediate cell is affected by three input cells, which are determined by the value of the plurality of these three inputs. The logical expression of a majority gate is M(A, B, C) = AB + AC + BC. As we all know, in the traditional CMOS circuit, the circuit structure that plays this kind of choice is more complex, but in the QCA circuit, only five cells are needed, which is a big advantage of the QCA circuit. According to the logical expression of the gate, if we set one of the inputs with a polarity value of 0 or 1, then we can get the two-input AND gate or the two-input OR gate.
QCA circuits also have the concept of a clock. Unlike the clock used in conventional circuits, the clock in QCA not only decides the direction of the delivery of information, but also provides enough energy for information transmission. It promotes the movement of electrons in cells and allows them to alter their structure in a predetermined manner by changing the tunneling barrier between the quantum dots[4]. The clock phase in the QCA is expressed as a switch, hold, release, and relax. Fig. 2(a) shows a four-phase clocking scheme. In the holding phase, the tunnel barrier remains in the highest level and the electrons stay in a stationary state. The tunnel barrier begins to descend during the release phase and the electronic movement is slow. In the relaxation phase, the tunnel barrier remains at the lowest state and the electrons are free to enter the tunnel. The electrons begin to flow in the switch phase. These four different phases are used to guarantee that the signal can reach the QCA logic gate at the same time.
Calculate the electrostatic energy among cell a and cell b using the following equation:
$${E^{m,n}_{a,b}} = frac{1}{{4pi {varepsilon _0}{varepsilon _r}}}sumlimits_{a = 1}^4 {sumlimits_{b = 1}^4 {frac{{q_a^mq_b^n}}{{left| {{r_{a,b}}} ight|}}} } .$$  | (1) |
In this formula, ε0 is the permittivity of the vacuum, εr is the relative permittivity of the material used,
m{a}}^m$
$$E_{i,j}^k = E_{i,j}^{ m {opp.polarization}} - E_{i,j}^{ m {same.polarization}}.$$  | (2) |
The kink energy among the two cells depends on the size of the QCA cell and the distance between neighbor cells, independent of other conditions such as temperature.
Defects occur frequently in both synthesis steps as well as in deposition steps in the manufacturing process. It is more likely to occur during the deposition stage than the chemical synthesis stage, which leads to incomplete placement of the cells. Typical defects in the deposition step include the cell addition defect, cell displacement, and missing cell defect, as shown in Figs. 2(b)–2(d), respectively. In this paper, we are mainly concerned with the missing cell defects.
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Figure2.
(a) Clocking. (b) Cell addition defect. (c) Cell displacement defect. (d) Missing cell defect.
3.
Related prior work
The conventional majority gate mentioned above can only reach 20% fault-tolerant under single-cell omission defects, which will greatly affect the stability of QCA circuits. In recent years, a number of structures with fault tolerance have been proposed[2, 5, 10–15]. Initially, fully/non-fully populated tile structures were proposed[8, 9]. A fault tolerance majority gate with a 3 × 3 tile structure is proposed[11], which could reach 66.7%, however under the specific QCA cell properties, the tolerance can only reach 55.6%. Moreover, a new QCA majority gate based on 3 × 5 tiles was proposed[12], which can achieve 60% fault-tolerance under single missing cell defects. A significant design of fault-tolerant majority gate with normal cell was proposed by Kumar et al., which can achieve 87.50% fault tolerance in the absence of single cell defects[13]. In recent years, new majority gates based on hybrid QCA tiles were proposed, which could reach nearly 100% fault tolerance[2, 5]. However, these structures need rotated cells, which are difficult to achieve in terms of process. As an indispensable structure in QCA circuits, research on high fault-tolerant logic gates without rotated cells is of great significance.
4.
A novel fault-tolerant three-input majority gate
Due to process constraints, the use of rotate cells should be avoided as far as possible in actual design of circuits. In recent years, the performance of fault-tolerant logic gates constructed with normal cells has been gradually improved. In this study, a new fault tolerant three-input majority gate is designed based on normal cells as shown in Fig. 3. The three inputs cells (A, B, C) are provided at different positions of the gate and on the remaining side of the output cell (Output). The design has a total of 36 cells, covering an area of 0.028 μm2. Moreover, the proposed gate has a delay of 0.25 clock cycle. The functionality of the proposed logic gates has been verified by QCADesigner.
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Figure3.
Proposed fault-tolerant majority gate.
4.1
Fault tolerance analysis of the majority gate
The next work is to analyze and compare the fault tolerance of majority gates. In the process of manufacturing devices may lead to the loss of one or more cells, in order to reflect the high reliability of the proposed majority gate, in this paper, the function of single-cell omission and double-cell omission defects will be analyzed respectively. For ease of analysis, each cell of the majority gate is numbered (excluding the input and output cells) before the experiment, as shown in Fig. 4. Table 1 presents the simulation results for the majority gate under defects of single-cell omission. Table 2 reflects the results of incorrect outputs of the majority gates in double-cell omission defects. Tables 3 and 4 provide comparisons of the fault-tolerant characteristics of the different majority gates using normal cells under single-cell and double-cell omission defects, respectively.
| Cell pair | Output | Cell pair | Output |
| (2, 3) | B | (11, 12) | C |
| (2, 6) | C | (15, 22) | $overline {{ m{MV(A, B, C)}}} $ |
| (5, 6) | C | (18, 19) | A |
| (6, 7) | C | (30, 31) | B |
| (6, 12) | C | (26, 27) | MV(A, B, $overline { m{C}} $) |
| (10, 17) | MV(A, $overline { m{B}} $, C) | (19, 26) | A |
| (7, 13) | C | (12, 13) | C |
| (10, 11) | C | (19, 20) | B |
Table2.
Combination of error output under double-cell omission defects.
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| Cell pair | Output | Cell pair | Output |
| (2, 3) | B | (11, 12) | C |
| (2, 6) | C | (15, 22) | $overline {{ m{MV(A, B, C)}}} $ |
| (5, 6) | C | (18, 19) | A |
| (6, 7) | C | (30, 31) | B |
| (6, 12) | C | (26, 27) | MV(A, B, $overline { m{C}} $) |
| (10, 17) | MV(A, $overline { m{B}} $, C) | (19, 26) | A |
| (7, 13) | C | (12, 13) | C |
| (10, 11) | C | (19, 20) | B |
| Function | Ref. [11] | Ref. [12] | Ref. [13] | Proposed |
| Wire function | 0 | 4 | 2 | 2 |
| MV-like function | 4 | 2 | 0 | 0 |
| MV(A, B, C) | 5 | 9 | 14 | 30 |
| Total | 9 | 15 | 16 | 32 |
| Percent (%) | 55.6 | 60 | 87.5 | 93.8 |
Table3.
Performance comparison of majority gates under single-cell omission defects.
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| Function | Ref. [11] | Ref. [12] | Ref. [13] | Proposed |
| Wire function | 0 | 4 | 2 | 2 |
| MV-like function | 4 | 2 | 0 | 0 |
| MV(A, B, C) | 5 | 9 | 14 | 30 |
| Total | 9 | 15 | 16 | 32 |
| Percent (%) | 55.6 | 60 | 87.5 | 93.8 |
| Function | Ref. [11] | Ref. [12] | Ref. [13] | Proposed |
| Wire function | 5 | 13 | 6 | 13 |
| MV-like function | 5 | 4 | 2 | 3 |
| Undefined | 1 | 1 | 0 | 0 |
| MV(A, B, C) | 1 | 4 | 12 | 32 |
| Total | 12 | 22 | 20 | 48 |
| Percent (%) | 8.3 | 18.2 | 60.0 | 66.7 |
Table4.
Performance comparison of majority gates under double-cell omission defects.
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| Function | Ref. [11] | Ref. [12] | Ref. [13] | Proposed |
| Wire function | 5 | 13 | 6 | 13 |
| MV-like function | 5 | 4 | 2 | 3 |
| Undefined | 1 | 1 | 0 | 0 |
| MV(A, B, C) | 1 | 4 | 12 | 32 |
| Total | 12 | 22 | 20 | 48 |
| Percent (%) | 8.3 | 18.2 | 60.0 | 66.7 |
| Cell | Output | Cell | Output | Cell | Output | Cell | Output |
| 1 | Correct | 9 | Correct | 17 | Correct | 25 | Correct |
| 2 | A | 10 | Correct | 18 | Correct | 26 | Correct |
| 3 | Correct | 11 | Correct | 19 | Correct | 27 | Correct |
| 4 | Correct | 12 | C | 20 | Correct | 28 | Correct |
| 5 | Correct | 13 | Correct | 21 | Correct | 29 | Correct |
| 6 | Correct | 14 | Correct | 22 | Correct | 30 | Correct |
| 7 | Correct | 15 | Correct | 23 | Correct | 31 | Correct |
| 8 | Correct | 16 | Correct | 24 | Correct | 32 | Correct |
Table1.
Output of the proposed majority gate against single-cell omission defect.
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| Cell | Output | Cell | Output | Cell | Output | Cell | Output |
| 1 | Correct | 9 | Correct | 17 | Correct | 25 | Correct |
| 2 | A | 10 | Correct | 18 | Correct | 26 | Correct |
| 3 | Correct | 11 | Correct | 19 | Correct | 27 | Correct |
| 4 | Correct | 12 | C | 20 | Correct | 28 | Correct |
| 5 | Correct | 13 | Correct | 21 | Correct | 29 | Correct |
| 6 | Correct | 14 | Correct | 22 | Correct | 30 | Correct |
| 7 | Correct | 15 | Correct | 23 | Correct | 31 | Correct |
| 8 | Correct | 16 | Correct | 24 | Correct | 32 | Correct |
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Figure4.
Majority gate with numbered cells.
The simulation results of the logic gate under single-cell omission defects can be roughly summarized into three categories: “MV”, “MV-like” and “wire”. As can be seen from the results in these tables, in single-cell and double-cell omission defects, the probability of the majority gate correct function was 93.8% and 66.7%, respectively. Under the same simulation parameters, the fault-tolerant characteristics of the gate are much better than those in the literature[11–13].
4.2
Physical proof
In order to test the feasibility and effectiveness of the proposed majority gate in the absence of single cell defects, it is necessary to verify the device after simulation. Since the proposed design has 32 different middle cells, in order to make the verification more persuasive, each cell needs to be analyzed to cover all possible failures. Only one of these faults (missing cell 15) is analyzed in this paper, and the proof of the other cases is similar.
$$U = frac{{k{q_1}{q_2}}}{r},$$  | (3) |
$$k{q_1}{q_2} = 23.04 , times , {10^{ - 29}} = A,$$  | (4) |
$${U_{ m T}} = sumlimits_{i = 1}^2 {{U_i}} .$$  | (5) |
In order to make the system more stable, the electrons in the QCA cells tend to be arranged in a minimal kink energy. The kink energy between two electron charges is calculated by Eq. (3). In this equation, U is kink energy, k is a constant, q1 and q2 are charges, and r is the distance between two charges. Through the values of q and k, we can obtain Eq. (4). Finally, the total kink energy UT is calculated by Eq. (5).
In the case of physical proof, it is assumed that all cells are similar and the length of each cell is 18 nm (a = 18 nm), and the spacing between two adjacent cells is 2 nm (x = 2 nm). Before the calculation, the radius of the impact of the cell cannot be ignored. In this design, the radius of influence is set at 65 nm, in other words, it affects three different cells. When the input is set, after the cell of number 15 is lost, only the cells of the gray region will affect the output cell, as shown in Fig. 5. In calculations, the input (A, B, C) = (1, 0, 1) is assumed, and each electron in Fig. 6 is labeled in order to make the calculation clearer. Table 5 presents the result calculated using Eqs. (3)–(5). In the table, UT1 represents the kink energy in +1 polarization and UT2 is the kink energy in ?1 polarization. As can be seen from Table 5, the kink energy of Fig. 6(a) is lower than that of Fig. 6(b), which proves that the output of Fig. 6(a) is firmer, that is, the polarization value of the output cell is +1. These calculation results are consistent with the results of the simulation. All other inputs (A, B, C) can be proved in a similar way.
| Fig. 6(a) (electron x) | Fig. 6(a) (electron y) |
| U1 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_1}}} = frac{{23.04 times {{10}^{ - 29}}}}{{44.72 times {{10}^{ - 9}}}}$ ≈ 0.52 × 10?29 (J) | U1 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_1}}} = frac{{23.04 times {{10}^{ - 29}}}}{{43.91 times {{10}^{ - 9}}}}$ ≈ 0.52 × 10?29 (J) |
| U2 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_2}}} = frac{{23.04 times {{10}^{ - 29}}}}{{58.03 times {{10}^{ - 9}}}}$ ≈ 0.40 × 10?29 (J) | U2 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_2}}} = frac{{23.04 times {{10}^{ - 29}}}}{{44.72 times {{10}^{ - 9}}}}$ ≈ 0.52 × 10?29 (J) |
| U3 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_3}}} = frac{{23.04 times {{10}^{ - 29}}}}{{40 times {{10}^{ - 9}}}}$ ≈ 0.58 × 10?29 (J) | U3 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_3}}} = frac{{23.04 times {{10}^{ - 29}}}}{{23.42 times {{10}^{ - 9}}}}$ ≈ 0.81 × 10?29 (J) |
| U4 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_4}}} = frac{{23.04 times {{10}^{ - 29}}}}{{60.73 times {{10}^{ - 9}}}}$ ≈ 0.38 × 10?29 (J) | U4 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_4}}} = frac{{23.04 times {{10}^{ - 29}}}}{{40 times {{10}^{ - 9}}}}$ ≈ 0.58 × 10?29 (J) |
| U5 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_5}}} = frac{{23.04 times {{10}^{ - 29}}}}{{28.28 times {{10}^{ - 9}}}}$ ≈ 0.81 × 10?29 (J) | U5 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_5}}} = frac{{23.04 times {{10}^{ - 29}}}}{{38.05 times {{10}^{ - 9}}}}$ ≈ 0.61 × 10?29 (J) |
| U6 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_6}}} = frac{{23.04 times {{10}^{ - 29}}}}{{38.05 times {{10}^{ - 9}}}}$ ≈ 0.61 × 10?29 (J) | U6 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_6}}} = frac{{23.04 times {{10}^{ - 29}}}}{{28.28 times {{10}^{ - 9}}}}$ ≈ 0.81 × 10?29 (J) |
| U7 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_7}}} = frac{{23.04 times {{10}^{ - 29}}}}{{44.72 times {{10}^{ - 9}}}}$ ≈ 0.52 × 10?29 (J) | U7 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_7}}} = frac{{23.04 times {{10}^{ - 29}}}}{{22.09 times {{10}^{ - 9}}}}$ ≈ 1.04 × 10?29 (J) |
| U8 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_8}}} = frac{{23.04 times {{10}^{ - 29}}}}{{69.34 times {{10}^{ - 9}}}}$ ≈ 0.33 × 10?29 (J) | U8 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_8}}} = frac{{23.04 times {{10}^{ - 29}}}}{{69.34 times {{10}^{ - 9}}}}$ ≈ 0.33 × 10?29 (J) |
| U9 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_9}}} = frac{{23.04 times {{10}^{ - 29}}}}{{56.57 times {{10}^{ - 9}}}}$ ≈ 0.41 × 10?29 (J) | U9 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_9}}} = frac{{23.04 times {{10}^{ - 29}}}}{{31.11 times {{10}^{ - 9}}}}$ ≈ 0.74 × 10?29 (J) |
| U10 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{10}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{82.08 times {{10}^{ - 9}}}}$ ≈ 0.28 × 10?29 (J) | U10 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{10}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{56.57 times {{10}^{ - 9}}}}$ ≈ 0.41 × 10?29 (J) |
| U11 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{11}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{44.72 times {{10}^{ - 9}}}}$ ≈ 0.52 × 10?29 (J) | U11 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{11}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{22.09 times {{10}^{ - 9}}}}$ ≈ 1.04 × 10?29 (J) |
| U12 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{12}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{69.34 times {{10}^{ - 9}}}}$ ≈ 0.33 × 10?29 (J) | U12 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{12}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{44.72 times {{10}^{ - 9}}}}$ ≈ 0.52 × 10?29 (J) |
| U13 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{13}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{28.28 times {{10}^{ - 9}}}}$ ≈ 0.81 × 10?29 (J) | U13 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{13}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{2.83 times {{10}^{ - 9}}}}$ ≈ 8.14 × 10?29 (J) |
| U14 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{14}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{53.74 times {{10}^{ - 9}}}}$ ≈ 0.43 × 10?29 (J) | U14 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{14}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{28.28 times {{10}^{ - 9}}}}$ ≈ 0.81 × 10?29 (J) |
| U15 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{15}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{20 times {{10}^{ - 9}}}}$ ≈ 1.15 × 10?29 (J) | U15 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{15}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{18.11 times {{10}^{ - 9}}}}$ ≈ 1.27 × 10?29 (J) |
| U16 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{16}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{42.05 times {{10}^{ - 9}}}}$ ≈ 0.55 × 10?29 (J) | U16 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{16}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{20 times {{10}^{ - 9}}}}$ ≈ 1.15 × 10?29 (J) |
| U17 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{17}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{60 times {{10}^{ - 9}}}}$ ≈ 0.38 × 10?29 (J) | U17 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{17}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{45.69 times {{10}^{ - 9}}}}$ ≈ 0.50 × 10?29 (J) |
| U18 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{18}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{80.05 times {{10}^{ - 9}}}}$ ≈ 0.29 × 10?29 (J) | U18 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{18}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{60 times {{10}^{ - 9}}}}$ ≈ 0.38 × 10?29 (J) |
| UT11 = $setlength{voffset}{1pt}$displaystylesumlimits_{i = 1}^{18} {{U_i}} $ = 9.3 × 10?20 (J) | UT12 = $setlength{voffset}{1pt}$displaystylesumlimits_{i = 1}^{18} {{U_i}} $ = 20.18 × 10?20 (J) |
Table5.
Physical verification of 65 nm radius.
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| Fig. 6(a) (electron x) | Fig. 6(a) (electron y) |
| U1 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_1}}} = frac{{23.04 times {{10}^{ - 29}}}}{{44.72 times {{10}^{ - 9}}}}$ ≈ 0.52 × 10?29 (J) | U1 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_1}}} = frac{{23.04 times {{10}^{ - 29}}}}{{43.91 times {{10}^{ - 9}}}}$ ≈ 0.52 × 10?29 (J) |
| U2 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_2}}} = frac{{23.04 times {{10}^{ - 29}}}}{{58.03 times {{10}^{ - 9}}}}$ ≈ 0.40 × 10?29 (J) | U2 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_2}}} = frac{{23.04 times {{10}^{ - 29}}}}{{44.72 times {{10}^{ - 9}}}}$ ≈ 0.52 × 10?29 (J) |
| U3 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_3}}} = frac{{23.04 times {{10}^{ - 29}}}}{{40 times {{10}^{ - 9}}}}$ ≈ 0.58 × 10?29 (J) | U3 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_3}}} = frac{{23.04 times {{10}^{ - 29}}}}{{23.42 times {{10}^{ - 9}}}}$ ≈ 0.81 × 10?29 (J) |
| U4 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_4}}} = frac{{23.04 times {{10}^{ - 29}}}}{{60.73 times {{10}^{ - 9}}}}$ ≈ 0.38 × 10?29 (J) | U4 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_4}}} = frac{{23.04 times {{10}^{ - 29}}}}{{40 times {{10}^{ - 9}}}}$ ≈ 0.58 × 10?29 (J) |
| U5 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_5}}} = frac{{23.04 times {{10}^{ - 29}}}}{{28.28 times {{10}^{ - 9}}}}$ ≈ 0.81 × 10?29 (J) | U5 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_5}}} = frac{{23.04 times {{10}^{ - 29}}}}{{38.05 times {{10}^{ - 9}}}}$ ≈ 0.61 × 10?29 (J) |
| U6 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_6}}} = frac{{23.04 times {{10}^{ - 29}}}}{{38.05 times {{10}^{ - 9}}}}$ ≈ 0.61 × 10?29 (J) | U6 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_6}}} = frac{{23.04 times {{10}^{ - 29}}}}{{28.28 times {{10}^{ - 9}}}}$ ≈ 0.81 × 10?29 (J) |
| U7 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_7}}} = frac{{23.04 times {{10}^{ - 29}}}}{{44.72 times {{10}^{ - 9}}}}$ ≈ 0.52 × 10?29 (J) | U7 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_7}}} = frac{{23.04 times {{10}^{ - 29}}}}{{22.09 times {{10}^{ - 9}}}}$ ≈ 1.04 × 10?29 (J) |
| U8 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_8}}} = frac{{23.04 times {{10}^{ - 29}}}}{{69.34 times {{10}^{ - 9}}}}$ ≈ 0.33 × 10?29 (J) | U8 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_8}}} = frac{{23.04 times {{10}^{ - 29}}}}{{69.34 times {{10}^{ - 9}}}}$ ≈ 0.33 × 10?29 (J) |
| U9 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_9}}} = frac{{23.04 times {{10}^{ - 29}}}}{{56.57 times {{10}^{ - 9}}}}$ ≈ 0.41 × 10?29 (J) | U9 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_9}}} = frac{{23.04 times {{10}^{ - 29}}}}{{31.11 times {{10}^{ - 9}}}}$ ≈ 0.74 × 10?29 (J) |
| U10 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{10}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{82.08 times {{10}^{ - 9}}}}$ ≈ 0.28 × 10?29 (J) | U10 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{10}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{56.57 times {{10}^{ - 9}}}}$ ≈ 0.41 × 10?29 (J) |
| U11 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{11}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{44.72 times {{10}^{ - 9}}}}$ ≈ 0.52 × 10?29 (J) | U11 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{11}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{22.09 times {{10}^{ - 9}}}}$ ≈ 1.04 × 10?29 (J) |
| U12 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{12}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{69.34 times {{10}^{ - 9}}}}$ ≈ 0.33 × 10?29 (J) | U12 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{12}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{44.72 times {{10}^{ - 9}}}}$ ≈ 0.52 × 10?29 (J) |
| U13 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{13}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{28.28 times {{10}^{ - 9}}}}$ ≈ 0.81 × 10?29 (J) | U13 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{13}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{2.83 times {{10}^{ - 9}}}}$ ≈ 8.14 × 10?29 (J) |
| U14 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{14}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{53.74 times {{10}^{ - 9}}}}$ ≈ 0.43 × 10?29 (J) | U14 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{14}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{28.28 times {{10}^{ - 9}}}}$ ≈ 0.81 × 10?29 (J) |
| U15 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{15}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{20 times {{10}^{ - 9}}}}$ ≈ 1.15 × 10?29 (J) | U15 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{15}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{18.11 times {{10}^{ - 9}}}}$ ≈ 1.27 × 10?29 (J) |
| U16 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{16}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{42.05 times {{10}^{ - 9}}}}$ ≈ 0.55 × 10?29 (J) | U16 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{16}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{20 times {{10}^{ - 9}}}}$ ≈ 1.15 × 10?29 (J) |
| U17 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{17}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{60 times {{10}^{ - 9}}}}$ ≈ 0.38 × 10?29 (J) | U17 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{17}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{45.69 times {{10}^{ - 9}}}}$ ≈ 0.50 × 10?29 (J) |
| U18 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{18}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{80.05 times {{10}^{ - 9}}}}$ ≈ 0.29 × 10?29 (J) | U18 = $setlength{voffset}{1pt}$displaystylefrac{A}{{{r_{18}}}} = frac{{23.04 times {{10}^{ - 29}}}}{{60 times {{10}^{ - 9}}}}$ ≈ 0.38 × 10?29 (J) |
| UT11 = $setlength{voffset}{1pt}$displaystylesumlimits_{i = 1}^{18} {{U_i}} $ = 9.3 × 10?20 (J) | UT12 = $setlength{voffset}{1pt}$displaystylesumlimits_{i = 1}^{18} {{U_i}} $ = 20.18 × 10?20 (J) |
onerror="this.onerror=null;this.src='http://www.jos.ac.cn/fileBDTXB/journal/article/jos/2018/8/PIC/17070036-5.jpg'" class="figure_img" id="Figure5"/>
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Figure5.
Influence radius.
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Figure6.
Different arrangement of electrons.
5.
Design of fault tolerant decoder
Decoders are not only used for code conversion, terminal digital display, but also for data distribution, memory addressing, and combined control signals, etc. Although a lot of decoder circuits have been designed so far[17–21], their fault-tolerant performance needs to be further improved. Inspired by the literature[13, 16], a 2-4 decoder built with the proposed majority gate is designed as shown in Fig. 7. The bottom structure of the layout is shown in Fig. 8. The simulation result is shown in Fig. 9. The decoder uses a multi-layer structure, a total of four outputs (Y0, Y1, Y2, Y3), where Y1, Y2 in the bottom, and Y0, Y3 in the top. With an area of 0.13 μm2, the new decoder is built with a delay of 0.75 clock phases.
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Figure7.
Proposed fault-tolerant 2-4 decoder.
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Figure8.
The bottom layer of the decoder.
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Figure9.
Simulation result for proposed 2-4 decoder.
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Figure11.
Fault tolerant comparison of output Y1.
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Figure12.
Fault tolerant comparison of output Y2.
This paper investigates the fault tolerance of 2-4 decoders in the absence of single cell defects. As a result of the simulation analysis, it can be seen that the output tolerances of the proposed decoder are very high, reaching 93.10%, 99.13%, 96.52%, and 98.26%, respectively. Table 6 provides a comparison of the different 2-4 decoders in terms of the fault-tolerance of the four outputs, delay, and area. Figs. 10–13 provide their fault tolerance comparison at different outputs. It can be seen from these data that the proposed 2-4 decoder has a very high fault tolerance (output tolerance of Y1 is close to 100%), while also having a low delay. Compared with other decoders have very good performance attributes. Besides, a new 3-8 decoder was designed on the basis of this circuit. Figs. 14 and 15 show the layout of the 3-8 decoder and its simulation result, respectively.
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Figure14.
Layout of the 3-8 decoder.
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Figure15.
Simulation result for proposed 3-8 decoder.
| Parameter | Proposed | Ref. [17] | Ref. [18] | Ref. [19] | Ref. [20] | Ref. [21] | |
| Fault tolerance (%) | Y0 | 93.10 | 82.17 | 90.48 | 69.32 | 76.19 | 81.37 |
| Y1 | 99.13 | 66.67 | 77.80 | 76.14 | 76.19 | 77.06 | |
| Y2 | 96.52 | 64.34 | 68.25 | 78.69 | 80.95 | 59.08 | |
| Y3 | 98.26 | 87.60 | 76.19 | 85.23 | 66.67 | 49.02 | |
| Delay (clock phases) | 0.75 | 1.25 | 0.75 | 1.75 | 1 | 0.75 | |
| Area (μm2) | 0.13 | 0.16 | 0.10 | 0.47 | 0.11 | 0.14 | |
Table6.
Comparison of 2-4 decoders.
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| Parameter | Proposed | Ref. [17] | Ref. [18] | Ref. [19] | Ref. [20] | Ref. [21] | |
| Fault tolerance (%) | Y0 | 93.10 | 82.17 | 90.48 | 69.32 | 76.19 | 81.37 |
| Y1 | 99.13 | 66.67 | 77.80 | 76.14 | 76.19 | 77.06 | |
| Y2 | 96.52 | 64.34 | 68.25 | 78.69 | 80.95 | 59.08 | |
| Y3 | 98.26 | 87.60 | 76.19 | 85.23 | 66.67 | 49.02 | |
| Delay (clock phases) | 0.75 | 1.25 | 0.75 | 1.75 | 1 | 0.75 | |
| Area (μm2) | 0.13 | 0.16 | 0.10 | 0.47 | 0.11 | 0.14 | |
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Figure10.
Fault tolerant comparison of output Y0.
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Figure13.
Fault tolerant comparison of output Y3.
6.
Conclusions
A new fault-tolerant three-input majority gate implemented by normal cells was proposed in this work. The fault tolerance of the proposed majority gate was simulated and summarized under cell omission defects. It can be seen from the simulation results that the proposed gate achieves 93.8% fault tolerance under single-cell omission defects, which is more robust than the previous design. Moreover, some physical proofs have validated the functionality of the proposed structure. Design of a fault-tolerant 2-4 decoder circuit and a 3-8 decoder circuit have also been presented. The simulation results show that the proposed 2-4 decoder can achieve a high degree of fault tolerance. Compared with existing decoders, its performance indicators relative to other designs also performed quite well.
