1.School of Information and Electronic Engineering, Shandong Technology and Business University, Yantai 264005, China 2.School of Electronic Science and Engineering, Nanjing University, Nanjing 210093, China
Fund Project:Project supported by the Key Program of the National Natural Science Foundation of China (Grant No. 61634002), the Young Scientists Fund of the National Natural Science Foundation of China (Grant No. 61804089), the Program of Joint Funds of the National Natural Science Foundation of China (Grant No. U1830109), the Science and Technology Program of the Higher Education Institutions of Shandong Province, China (Grant No. J16LN04), and the Key R&D Program of Yantai, China (Grant No. 2017ZH064)
Received Date:27 July 2019
Accepted Date:26 October 2019
Available Online:27 November 2019
Published Online:01 December 2019
Abstract:Based on the drift-diffusion transport model, Fermi-Dirac statistics and Shockley-Read-Hall recombination model, the effect of the structure parameters on the performance of N-polar GaN/InAlN high electron mobility transistor is investigated by self-consistently solving the Schrodinger equation, Poisson equation and carrier continuity equation. The results indicate that the saturation current density of the device increases and the threshold voltage shifts negatively with GaN channel thickness increasing from 5 nm to 15 nm and InAlN back barrier thickness increasing from 10 nm to 40 nm. The maximum transconductance decreases with GaN channel thickness increasing or InAlN back barrier thickness decreasing. The change trends of the various performance parameters become slow gradually with the increase of the thickness of the GaN channel layer and InAlN back barrier layer. When the GaN channel thickness is beyond 15 nm or the InAlN back barrier thickness is more than 40 nm, the saturation current, the threshold voltage and the maximum transconductance tend to be stable. The influence of the structure parameter on the device performance can be mainly attributed to the dependence of the built-in electric field, energy band structure and the two-dimensional electron gas (2DEG) on the thickness of the GaN channel layer and InAlN back barrier layer. The main physical mechanism is explained as follows. As the GaN channel thickness increases from 5 nm to 15 nm, the bending of the energy band in the GaN channel layer is mitigated, which means that the total built-in electric field in this layer decreases. However, the potential energy drop across this GaN channel layer increases, resulting in the fact that the quantum well at the GaN/InAlN interface becomes deeper. So the 2DEG density increases with GaN channel thickness increasing. Furthermore, the saturation current density of the device increases and the threshold voltage shifts negatively. Moreover, due to the larger distance between the gate and the 2DEG channel, the capability of the gate control of the high electron mobility transistor decreases. Similarly, the depth of the GaN/InAlN quantum well increases with InAlN back barrier thickness increasing from 10 nm to 40 nm, which results in the increase of the 2DEG concentration. Meanwhile, the electron confinement in the quantum well is enhanced. Therefore the device saturation current and the maximum transconductance increase with InAlN back barrier thickness increasing. Keywords:N-polar GaN/InAlN/ high electron mobility transistor/ structure parameter/ electrical performance
由于减薄N极性面HEMT中GaN沟道层厚度可直接缩小栅极与2DEG沟道之间的距离, 从而使得在稍微降低器件输出性能的同时较大程度地提高器件的跨导即栅控能力, 使其更适于高频应用. 因此, 模拟研究InAlN背势垒层厚度对N极性面GaN/InAlN HEMT器件性能的影响时, GaN沟道层厚度设为5 nm, In0.18Al0.82N背势垒层厚度的变化范围为10—45 nm. 图4(a)—(c)分别为不同InAlN背势垒层厚度下, HEMT器件的输出特性(Vgs = 0 V)、转移特性(Vds = 10 V)以及跨导曲线. 图 4 不同InAlN背势垒层厚度下, N极性面GaN/InAlN HEMT器件的(a)输出特性、(b) 转移特性和(c)跨导曲线 Figure4. (a) Output characteristics, (b) transfer characteristics, and (c) transconductance curves of N-polar GaN/InAlN HEMTs with different InAlN back barrier thicknesses.
由图4可看出, N极性面GaN/InAlN HEMT器件的饱和输出电流与跨导峰值随着InAlN背势垒层厚度的增加而增大, 器件的阈值电压发生负向漂移. 上述变化趋势随着InAlN背势垒层厚度的增加而逐渐变缓. 当InAlN厚度达40 nm时, 器件的性能参数基本趋于稳定. 为解释上述现象, 模拟分析了不同InAlN背势垒层厚度情况下, HEMT器件栅极下方GaN/In0.18Al0.82N/GaN异质结的导带结构与电子浓度的分布情况, 结果如图5(a)和图5(b)所示. 由图5(a)及其插图可知, 增加InAlN背势垒层的厚度, 其极化效应相应增强, 导致GaN/InAlN界面处三角势阱的深度增加, 相应2DEG限域性得到提高. 2DEG限域性的提高使得器件的跨导即栅控能力增大. 另外, 极化效应的增强直接导致沟道内2DEG浓度的增加(如图5(b)所示). 2DEG浓度的增大使得HEMT器件的饱和输出电流增大, 与此同时耗尽沟道2DEG需要更大的栅极负偏压, 即阈值电压发生负向漂移. 图 5 不同InAlN背势垒层厚度下, N极性面GaN/InAlN HEMT器件栅极下方的(a)导带结构(内插图为三角势阱处导带结构的局部放大图), 以及(b) 电子浓度分布图 Figure5. (a) Conduction-band energy diagram and (b) electron distribution in N-polar GaN/InAlN HEMTs with different InAlN back barrier thicknesses. The inset in panel (a) is the partial enlarged conduction-band energy of the rectangular quantum well.