1.
Introduction

Cu based upon quaternary compounds of Cu₂–II–IV–VI₄ and Cu–III–IV–VI₄ are interesting materials for photovoltaic applications since these products display direct band gaps that perfectly correspond to the solar spectrum as well as their good electronic features that recently produced solar cells with efficiencies exceeding 20%^[1–4]. CuInGeSe₄ is an interesting material for thin film solar cells. CuInGeSe₄ exhibits p-type conductivity due to copper vacancies supplying holes, as is the case for most of the Cu-chalcopyrite semiconductors^[5]. Similar to its related ternary compound, CuInGeSe₄ has a chalcopyrite structure formed by doubling the sphalerite unit cell and by ordered cationic substitution^{[6, 7]}. This compound has a high absorption coefficient and a narrow band gap energy of about 1.3 eV in its bulk form^[6] and 1.6 eV in thin films^[5], which is convenient to photovoltaic energy conversion^[8]. CuInGeSe₄ thin films were previously prepared by thermal evaporation of stacked layers followed by high-temperature selenization^[9]. The electron beam deposition approach provides various advantages above the thermal coating method. First, its source heats the substances to high temperatures in excess of that which is available in a resistive boat or crucible heater^[10]. This gives a quite high deposition rate and evaporation of high temperature substances and refractory metals particularly tungsten, tantalum, or graphite^[11]. Second, deposited films keep the purity of the source compound where the crucible cooling water properly limits the e-beam heating to the region filled by the source component only reducing unfavourable contamination generated by adjacent equipment^[12]. Finally, e-beam deposition sources are provided in various sizes and styles for instance, single or multiple pockets^[13].



In this work, we study the structural, electrical and photovoltaic properties of the CuInGeSe₄ thin film deposited by electron beam deposition onto n-type silicon single crystal substrates. The electrical properties of CuInGeSe₄/n-Si heterojunction devices were studied by the dark current-voltage characteristics and capacitance-voltage characteristics at different temperatures from 303 to 363 K. The photovoltaic properties of the CuInGeSe₄/n-Si heterojunction device have been estimated by measuring the current voltage characteristics for the CuInGeSe₄/n-Si heterojunction under different light illuminations 50, 100, 150, 200, and 250 mW/cm².

2.
Experimental techniques

2.1
Preparation of CuInGeSe₄

The bulk CuInGeSe₄ compound was prepared by fusion, which is often used when the melting points of the reacting compounds differ largely. In this method, the constituent elements of 5N copper, indium, germanium, and selenium were weighted to achieve a stoichiometric ratio of the CuInGeSe₄ compound. The mixture was sealed in a silica tube under vacuum (10^?6 mbar). The silica tube was processed by annealing it in an oxygen atmosphere to remove any active silica on the surface. The sealed tube was placed in an oscillatory electric furnace. In order to avoid the risk of explosion resulting from the evolution of selenium vapor, the temperature was raised slowly. The temperature of the furnace was first increased at the rate of 50 K/h up to 500 K. The tube was maintained at that temperature for a period of 24 h to minimize pressure build-up and to avoid possible strong exothermic reactions. The temperature was then increased up to 973 K at the rate of 60 K/h, beyond which a slow heating process was used to minimize the risk of tube cracking. The tube was kept at 1500 K for a period of 24 h and was rotated intermittently for 2 h to ensure complete mixing and reaction of the constituents. It was then cooled slowly in the furnace to 973 K and annealed at that temperature for 3?4 days. Finally, the furnace current was switched off and the tube was left to cool down to room temperature.

2.2
Fabrication of Au/CuInGeSe₄/n-Si/Al device

The CuInGeSe₄/n-Si device (Fig. 1) was obtained by deposition of thin films of CuInGeSe₄ of thickness 570 nm on the n-Si substrate by electron beam deposition using an electron beam gun evaporation system (Leybold-Heraeus Combitron CM-30, Germany). The thickness of the films was measured by a quartz thickness monitor (FTM5, Edwards, UK). A Si (100) wafer doped with phosphorus with a resistivity of 1–10 Ω·cm was used as the substrate. The Si wafer was etched by HF to remove any oxide layer^{[14, 15]}. After etching the Si wafer, it was washed with methyl alcohol and distilled water. Then, the ohmic contact was made by depositing an Al electrode on the back surface of the Si substrate by thermal evaporation. Finally, an Au electrode was evaporated onto the CuInGeSe₄ thin film in the shape of the grid using a shadow mask made from aluminum foil.






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Figure1.
(Color?online) Schematic diagram of Au/CuInGeSe₄/Al heterojunction device.

2.3
Characterization techniques

The structural properties of the CuInGeSe₄ thin films were investigated by X-ray diffraction (XRD, Philips X' pert MPD, PANalytical, Netherlands) using the CuK_α line (λ = 1.540 ?). The surface morphology images were obtained by high-resolution field-emission scanning electron microscopy (FESEM, Quanta FEG 250, FEI, USA). The elemental composition of the films was measured by an energy dispersive X-ray spectroscopy (EDX) unit attached to the FESEM. The current–voltage (I–V) characteristic of the Al/n-Si/p-CuInGeSe₄/Au heterojunction was obtained under a simulated illumination, which was calibrated to a light intensity that varied from 50 to 250 W/m². The dark capacitance–voltage (C–V) characteristics for the fabricated heterojunction were measured at different temperatures that varied from 303–383 K using a computerized C–V meter (CV, 4108 C–V, Solid State Measurement, Inc., Pittsburgh, USA).

3.
Results and discussions

3.1
Structural investigations

Fig. 2 shows the X-ray diffraction patterns of the CuInGeSe₄ bulk powder and thin film deposited at n-type Si substrate. The patterns indicate that both the CuInGeSe₄ bulk powder and thin films exhibit a polycrystalline nature with a tetragonal structure. For the observed diffraction peaks of bulk powder with JCPDF card No. 52-0866 indicated that the peaks appeared at 2θ = 27.85°, 36.91°, 43.97°, 46.08°, 54.68°, 67.13°, and 74.19° in the 2θ patterns of the samples are indexed to the (112), (211), (213), (220), (312), (400), and (332) planes of the CuInGeSe₄ tetragonal structure. Also, by comparing the observed diffraction peaks of thin films with the standard diffraction data file (JCPDF card No. 52-0866) indicated that the peaks appeared at 2θ = 27.85° and 43.97° are indexed to the (112) and (213) planes of the CuInGeSe₄ tetragonal structure with the highest XRD intensity, is belonging to the (112) plane.






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Figure2.
(Color?online) X-ray diffraction patterns of the CuInGeSe₄ thin film deposited onto n-Si substrate.




The grain sizes (D), the lattice strain (ε) and the dislocation density (δ) of the CuInGeSe₄ thin films deposited on Si substrates were calculated by the following equations^{[16, 17]}:

${{D}} = 0.94;{ m{lambda }}/{ m{beta cos}};{ m{theta,}}$

(1)

${ m{varepsilon }} = { m{beta cos}};{ m{theta }}/4{ m{,}}$

(2)

${ m{delta }} = 1/{{{D}}^2}{ m{,}}$

(3)

where β is the full-width at half maximum of the peak (in radian), λ is the X-ray wavelength (λ = 1.540 ?), and θ is the equivalent Bragg’s diffraction angle at the peak location.



The magnitudes of the grain size D, dislocation density δ, and the strain ε of the CuInGeSe₄ thin film are found to be 48 nm, 3.93 × 10^?3, and 1.14 × 10¹² line/cm², respectively.



Fig. 3 shows the EDX of the deposited CuInGeSe₄ thin film. The pattern identifies the presence of copper, indium, germanium, and selenium. The resulted atomic ratio of Cu, In, Ge, and Se in the CuInGeSe₄ thin film proved that the films are stoichiometric in composition. The inset of Fig. 3 shows the SEM image revealing the typical microstructure of CuInGeSe₄ thin film deposited by electron beam deposition. It is visible that the film exhibits a rough surface morphology. Good properties including the remarkably small-scale grain size of the deposited layer surface were detected as well. The particle size mean was detected as about 60 nm.






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Figure3.
(Color?online) The scanning electron microscope (SEM) micrograph and EDX of the CuInGeSe₄ thin film deposited onto n-Si substrate.

3.2
Current–voltage features of CuInGeSe₄/n-Si diode

Fig. 4 displays the I–V features of the CuInGeSe₄/n-Si device studied at different temperatures from 303 to 383 K. From this figure, it was observed that the current in the forward direction is larger than the reverse direction current, which indicates the rectifying style of the manufactured diode. The rectification ratio (RR) is stated as the proportion result of the current in the forward direction to the current in the reverse direction at a specified employed voltage^{[18, 19]}. The rectification factor magnitudes of the CuInGeSe₄/n-Si junction are listed in Table 1. The temperature dependence of RF is presented in Table 1, in which it is apparently viewed that the RF decreases with increasing the temperature.






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Figure4.
(Color?online) I–V characteristics of the Au/CuInGeSe₄/n-Si/Al device at different temperature in the dark




Current–voltage characteristics were described by the thermionic emission theory^[20]

$I = {I_{ m 0}}[{ m{exp}}(qV/nkT) - 1 ],$

(4)

where I₀ is the saturation current, V is the employed voltage, n is the ideality factor, q is the charge of electron, T is the absolute temperature, and K is the well-known constant of Boltzmann.



As mentioned in thermionic emission theory, the saturation current is provided by^[17]:

${I_{ m o}} = A{A^*}{T^2};{{ m e}^{textstylefrac{{ - q{phi _{ m b}}}}{{KT}}}},$

(5)

where A is the active area of the junction, A* is the Richardson constant for p-GaP, K is the well-known constant of Boltzmann, and ?_b is the barrier height.



The linearity change in the semilogarithmic plot of forward direction current–voltage features is definitely produced by the influence of series resistance and the impact of the local layer at the interface within high employed voltage. The series resistance,R_s, and shunt resistance, R_sh, are key elements for enhancing the device functionality and pattern.



The method^[21] used for determining the series resistance, R_s and shunt resistance, R_sh is from the drawing sketch of R_j against the biasing voltage^[22]:

${R_{ m j}} = partial V/partial I,$

(6)

Fig. 5 shows the relation of R_j versus the biasing voltage where it is obvious that by raising the bias voltage in the forward direction the resistance of the diode decreases and reaches a steady magnitude, which equals to the series resistance R_s^[23]. While by increasing the reverse applied voltage, the junction resistance increases and reaches a constant magnitude, which equates to the shunt resistance R_sh^[23]. At different temperatures, the R_s and R_sh magnitudes are included in Table 1. It was found that the magnitudes of R_s and R_sh decrease with temperature increase as a result of the diode conductivity improvement with the temperature increases^[24].






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Figure5.
(Color?online) Junction resistance (R_j) versus V for Au/CuInGeSe₄/n-Si/Al heterojunction device at different temperatures.




The ideality factor of the CuInGeSe₄/n-Si heterojunction is actually extracted from the slope of the linear part of ln I against the V feature with the aid of the subsequent equation^[25]:

$n = [ {q/kT} ][ {{ m d}V/{ m d}left( { m l{ m n}}I ight)} ],$

(7)

The barrier height ?_b is obtained by using the following equation^[26]:

${phi _{ m b}} = frac{{{K_B}T}}{q}{ m ln}left( {frac{{A{A^*}{T^2}}}{{{I_0}}}} ight).$

(8)

The temperature dependence of each of the ideality factor n and barrier height ?_b is presented in Table 1. It is obvious from the table that the ideality factor n decreases with increasing the temperature however, the barrier height ?_b increases with increasing the temperature, which is generated by the inhomogeneous barrier height or/and the junction interfacial layer^{[17, 27]}. The magnitudes of n and ?_b are outlined in Table 1. It is observed that the leakage currant has been increased with the increase in the temperature. The reputation of low-large-low barrier zones lead to the leakage current realization^[18]. A decrease of ideality factor with an increase of temperature was reported for several studies of diodes^{[14, 16]}. This stemming from the thermal activated transportation of current along the Schottky contact. Electrons can get over the low potential barrier at reduced temperatures. Consequently, the transportation of charge carriers will be dominated by current moving along the sections of lower barrier height and therefore a large ideality factor value^{[26, 28]}. Additional electrons get a sufficient amount of energy to surmount the higher barrier via temperature elevating. This gives a progression in conduction and reduction of ideality factor amount^[19]. Drop in potential at interfacial layer and existence of additional current and recombination current along interfacial states are the reasons for the higher ideality factor value^{[17, 25]}.

T (K)	RR (at ±1)	n	RS (kΩ)	Rsh (kΩ)	?b (eV)
303	94.21	2.76	2.51	132	0.53
323	90.52	2.59	2.13	125	0.58
343	87.17	2.38	1.75	119	0.62
363	81.45	2.19	1.48	115	0.68
383	74.96	1.95	1.12	111	0.71

Table1.
Junction parameters determined from the dark I–V characteristics of Au/CuInGeSe₄/n-Si/Al heterojunction.



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T (K)	RR (at ±1)	n	RS (kΩ)	Rsh (kΩ)	?b (eV)
303	94.21	2.76	2.51	132	0.53
323	90.52	2.59	2.13	125	0.58
343	87.17	2.38	1.75	119	0.62
363	81.45	2.19	1.48	115	0.68
383	74.96	1.95	1.12	111	0.71

Fig. 6 displays the current-voltage features of the fabricated device, i.e. CuInGeSe₄/n-Si, under different light illumination powers at room temperature. It can be seen from the figure that the device exhibits photovoltaic features. The device fill factor (FF) and the device efficiency (η) are counted with^[29]:






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Figure6.
(Color?online) I–V characteristics of Au/CuInGeSe₄/n-Si/Al heterojunction device at different illumination powers at room temperature.

${ m FF} = {V_{ m m}}{J_{ m m}}/{V_{ m oc}}{J_{ m sc}},$

(9)

$eta = left( {{V_{ m oc}}{J_{ m sc}}/A{P_{ m in}}} ight){ m FF} times 100%,$

(10)

where P_in is the power density of the incident light from the halogen lamp, which was estimated to be 50, 100, 150, 200, and 250 mW/cm², A is the device area, J_sc is the short-circuit current density, and V_oc is the open-circuit voltage.



The current density–voltage features of the CuInGeSe₄/n-Si device at room temperature under several illumination powers are presented in Fig. 7. The solar variables calculated for this device are outlined in Table 2. The light illumination power effect on the CuInGeSe₄/n-Si device efficiency η is displayed in Fig. 8. It is obvious that the magnitudes of efficiency η increase with increasing the illumination power where it changes from 2.05% at 50 mW/cm² to 2.94% at 250 mW/cm². The obtained results were in line with those achieved earlier for Al/n-Si/pCuInGeSe₄/Au by Hameed et al.^[30], where a conversion efficiency of 2.83% was obtained under 100 mW/cm² illumination.






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Figure8.
(Color?online) Illumination power dependence of η for Au/CuInGeSe₄/n-Si/Al heterojunction device.

Intensity (mW/cm2)	JSC	VOC	JM	VM	FF	η (%)
50	5.26	0.26	3.42	0.15	0.37	2.05
100	7.98	0.38	4.97	0.21	0.39	2.24
150	10.24	0.51	6.81	0.31	0.41	2.36
200	11.75	0.62	7.22	0.32	0.38	2.71
250	14.12	0.65	9.14	0.41	0.40	2.94

Table2.
The solar parameters determined from the J–V curve of Au/CuInGeSe₄/n-Si/Al heterojunction.



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Intensity (mW/cm2)	JSC	VOC	JM	VM	FF	η (%)
50	5.26	0.26	3.42	0.15	0.37	2.05
100	7.98	0.38	4.97	0.21	0.39	2.24
150	10.24	0.51	6.81	0.31	0.41	2.36
200	11.75	0.62	7.22	0.32	0.38	2.71
250	14.12	0.65	9.14	0.41	0.40	2.94

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Figure7.
(Color?online) J–V characteristics for Au/CuInGeSe₄/n-Si/Al solar cell under different illumination powers.




The capacitance–voltage properties are measured experimentally in darkness at a frequency of 5 MHz and several temperatures. Fig. 9 displays the C^?2–V characteristic of CuInGeSe₄/n-Si heterojunction at different temperature (303–383 K). It is obvious from the figure that the C^?2–V variation is linear which is indicating an abrupt character of the manufactured junction.






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Figure9.
(Color?online) The variation of 1/C² versus bias voltage of the Au/CuInGeSe₄/n-Si/Al heterojunction device at different temperatures.




For an abrupt junction, the capacitance of the junction is related to the reverse bias potential by^[31]:

${C^2} = frac{{q{N_{ m A}}{N_{ m D}}{varepsilon _1}{varepsilon _2}}}{{2left( {{varepsilon _1}{N_{ m A}} + {varepsilon _2}{N_{ m D}}} ight)}}frac{1}{{ {{V_{ m bi}} - V} }},$

(11)

where q is the electron charge, ε₁ is the dielectric permittivity of n-Si substrate, N_A is the acceptor carrier concentration of n-Si substrate, ε₂ is the dielectric permittivity of the CuInGeSe₄ layer, and N_D is donor carrier concentration for the CuInGeSe₄ layer.



The built-in voltages (V_bi) identified simply by extrapolating the straight lines to C^?2 = 0 while the net charge carrier concentration N is estimated from the extrapolated line slope. The estimated magnitudes of V_bi and N of the CuInGeSe₄/n-Si junction at different temperature are listed in Table 3. The variation of built-in voltages (V_bi) with temperature is presented in Fig. 10, where a decrease of V_bi with increasing the temperature is detected^[9].

T (K)	Vbi (V)	ND (1017 cm?3)
303	0.75	1.57
323	0.71	1.76
343	0.67	1.84
363	0.63	1.95
383	0.61	2.05

Table3.
Temperature dependent values of parameters determined from C–V characteristics of Au/CuInGeSe₄/n-Si/Al heterojunction.



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T (K)	Vbi (V)	ND (1017 cm?3)
303	0.75	1.57
323	0.71	1.76
343	0.67	1.84
363	0.63	1.95
383	0.61	2.05

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Figure10.
(Color?online) The variation of N_D and V_bi of the Au/CuInGeSe₄/n-Si/Al heterojunction device at different temperatures.

4. Conclusions

A CuInGeSe₄/n-Si heterojunction was successfully made by the electron beam deposition technique. The current–voltage characteristics of the heterojunction were measured in the temperature range 303–383 K. The effect of the temperature on the heterojunction variables including series resistance, shunt resistance, junction ideality factor, and the effective barrier height were recognized from measurements of current against voltage. Au/CuInGeSe₄/n-Si/Al devices were studied for photovoltaic cell applications. The magnitudes of the photovoltaic parameters, I_sc, V_op, FF, and η were calculated. The (C^?2–V) plots suggest the creation of an energy barrier with an abrupt type between the CuInGeSe₄ and n-Si.