1.
Introduction
3D integration is a promising new manufacturing technology that provides a feasible solution to the interconnect problem by using through-silicon-via (TSV) for integrating multi-layer circuits. 3D integrated circuits is considered to be the future development direction of integrated circuits. The integrated chip stacks in the vertical direction to increase the number of transistors of per unit area and make the integration of the chip greatly increased[1–5].
Compared with a traditional 2D circuit, the 3D circuit has a higher power density and higher temperature level. The high power density exacerbates the thermal issues, which in turn degrades the performance of both transistors and interconnects. Joule heating is the electrical power consumption of TSVs, which may cause an increase in the temperature. AS VLSI technology scales, the Joule heating in advanced technology nodes can strongly impact the performance of circuits. The temperature rise in TSVs due to Joule heating can be significant because TSVs are located away from the heat sink and the insulating layer with lower thermal conductivity prevents heat transfer. An increasing temperature may affect the transistors from switching states and causes circuit failures. Additionally, a large amount of current flowing through the TSVs induces significant electromigration. Otherwise, variation of TSVs resistance, that results from the influence of temperature, will degrade the TSVs performance[6–10].
However, all of the previous works on temperature analysis of TSVs have assumed that the heat source is constant, independent of temperature[11]. In reality, electrical-thermal coupling effects exist in TSVs. TSV power dissipation increases the temperature of TSV, on the other hand, the rise of temperature increases the TSV resistance and consequently reduces the power dissipation of TSVs with a given voltage. This process will be steady state with cycles of time.
In this paper, we propose analytical formulas for the calculation of the temperature of through-silicon vias considering the electrical–thermal coupling effects. Based on the analytical model of electrical–thermal coupling, temperature performance of the TSV is evaluated.
2.
Thermal response of TSV considering electrical–thermal coupling effects
In this paper, we focus on developing the analytical formulas for the thermal resistance in both lateral and vertical directions in terms of physical and material parameters. The blended model of lumped thermal equivalent circuit for TSV is built as shown in Fig. 1. rCu,
According to the one-dimensional heat diffusion equation, the steady-state temperature relations can be given by[12]:
$$frac{{{{ m d}^2}T}}{{{ m d}{x^2}}} = - frac{{Q_{ m {eff}}^*}}{{{k_{ m Cu}}}},$$  | (1) |
where Qeff* is the effective volumetric heat generation defined by[13] :
$$Q_{ m {eff}}^* = frac{{{P_{ m g}} - {P_{ m l}}}}{{pi {r^2}{ m d}x}}.$$  | (2) |
The power dissipation in a partial length dx can be expressed as:
$${P_{ m g}} = frac{{{V^2}}}{{{R_{ m E}}left( x ight){ m d}x}},$$  | (3) |
$${R_{ m E}}left( x ight) = {R_0}left( {1 + beta cdot Tleft( x ight)} ight),$$  | (4) |
$$beta = {beta _0} g,$$  | (5) |
$$hspace*{fill}{R_0} = ho frac{{Delta x}}{{pi r_{ m {Cu}}^2}}.hspace*{fill}tag{6-a}$$  | (6-a) |
At high frequencies
$$hspace*{fill} {R_0} = frac{{ ho Delta x}}{{pi left( {r_{ m {Cu}}^2 - {{left( {{r_{ m {Cu}}} - delta } ight)}^2}} ight)}},hspace*{fill}tag{6-b}$$  | (6-b) |
$$hspace*{fill}delta = sqrt {frac{ ho }{{pi fmu }}} ,hspace*{fill}tag{6-c}$$  | (6-c) |
where g is a correction factor, δ is the skin depth, f is the operating frequency and μ is the magnetic permeability. The energy loss due to the heat transfer between the copper core and the silicon-substrate through the silicon dioxide layer is:
$${P_l} = frac{{Tleft( x ight) - {T_{ m {sub}}}}}{{{ m d}{R_{ m T}}left( x ight)}},$$  | (7) |
$${t_{ m {ins}}} = {r_{ m {SiO_2}}} - {r_{ m {Cu}}},$$  | (8) |
$${ m d}{R_{ m T}}left( x ight) = frac{{{t_{ m {ins}}}}}{{k_{ m {SiO_2}}^*{r_{ m {SiO_2}}}{ m d}x}},$$  | (9) |
where
m {SiO_2}}^*$
$$k_{ m {SiO_2}}^* = {k_{ m {SiO_2}}}frac{{{t_{ m {ins}}}}}{d}1.685{left[ {log left( {1 + frac{{{t_{ m {ins}}}}}{d}} ight)} ight]^{ - 0.59}}{left( {frac{{{t_{ m {ins}}}}}{d}} ight)^{ - 0.078}}.$$  | (10) |
Using Eqs. (1)–(10), the heat conduction equations of a TSV can be written as follows:
$$frac{{{{ m d}^2}Tleft( x ight)}}{{{ m d}{x^2}}} = {lambda ^2}Tleft( x ight) - {alpha ^2}{T_{ m {sub}}} - theta ,$$  | (11) |
$${lambda ^2} = frac{1}{{{k_{ m Cu}}}}left( {frac{{k_{ m {SiO_2}}^*}}{{{r_{ m {Cu}}}{t_{ m {ins}}}}} - frac{{{I^2} ho beta }}{{{pi ^2}r_{ m {Cu}}^4}}} ight),$$  | (12) |
$${alpha ^2} = frac{{k_{ m {SiO_2}}^*}}{{{k_{ m {Cu}}}{r_{ m {Cu}}}{t_{ m {ins}}}}},$$  | (13) |
$$theta = frac{{{I^2} ho }}{{{pi ^2}r_{ m {Cu}}^4{k_{ m {Cu}}}}}.$$  | (14) |
Assume that the top surface of the TSV is thermally insulated and the boundary temperature is the room temperature Tsub. By solving the heat conduction Eqs. (11)–(14) with these boundary conditions, the temperature of the TSV can be written as:
$$Tleft( x ight) = frac{{{alpha ^2}{T_{ m {sub}}} + theta }}{{{lambda ^2}}} + frac{{left( {{lambda ^2} - {alpha ^2}} ight){T_{ m {sub}}} - theta }}{{{lambda ^2}left( {1 + {{ m e}^{lambda H}}} ight)}}left( {{{ m e}^{lambda left( {H - x} ight)}} + {{ m e}^{lambda x}}} ight).$$  | (15) |
In integrated circuits, TSV in the vertical direction is modeled as a resistance line, as shown in Fig. 2. From Ohm’s law, there is:
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Figure2.
(Color online) Single-layer TSV equivalent circuit.
$$Ileft( x ight) = frac{{Vleft( 0 ight) - Vleft( L ight)}}{{mathop smallint nolimits_0^h {R_{ m E}}left( x ight){ m d}x}}.$$  | (16) |
The I(x) here is equal to the I that was given before, I(x) = I. From Eqs. (4) and (16), RE is related to the temperature. The total TSV resistance can be written as:
$$begin{gathered} mathop smallint limits_0^h {R_{ m E}}left( x ight){ m d}x = {R_0}left( {1 - beta Tleft( x ight)} ight)H , + {R_0}beta left[ {frac{{{alpha ^2}{T_{ m {sub}}} + theta }}{{{lambda ^2}}}H + frac{{left( {{lambda ^2} - {alpha ^2}} ight){T_{ m {sub}}} - theta }}{{{lambda ^2}left( {1 + {{ m e}^{lambda H}}} ight)}}2left( {{{ m e}^{lambda H}} - 1} ight)} ight] . end{gathered} $$  | (17) |
Because of the temperature-dependent properties of materials, the above equations can be solved in an iteration procedure.
Step 1. The total length of TSV is discretized into many tiny position steps.
Step 2. In each step of position, e.g. from step “0” to step “1”, the equations are solved circularly until convergence.
Step 3. The temperature in the final iterative step is just the temperature of TSV.
Step 4. Finally Ifinal can be solved by Tlim and using the basic power equation P = Ifinal2 × RE, joule heat source can be obtained.
Assuming substrate temperature is Tsub = 293.15 K, it is always convergent because the TSV temperature and the TSV current affect each other in the opposite way. So, an iterative method is proposed for electrical-thermal of TSVs, as shown in Fig. 3. Initially, the TSV temperature is equal to the substrate temperature. Then, we give an iterative computation of TSV resistance, TSV current and TSV temperature until the temperature difference between two neighboring steps is smaller than the limited temperature value Tlim.
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Figure3.
The iterative method for electrothermal coupling.
As shown in Fig. 1, in which, P is the joule heat source, RTCu,
$$R_{ m {Cu}}^T = frac{T}{P}.$$  | (18) |
The temperature T and power P are calculated by the iteration method. According to the first law of thermo dynamics, the thermal resistance of Si and SiO2 with homogeneous materials is[16]:
$${R^T} = frac{sigma }{{kA}}.$$  | (19) |
where σ is the thickness of the material, k is the thermal conductivity of the material and A is the area of the resistance. Thus, the thermal resistances of an equivalent circuit in Fig. 1 are described as:
$$R_{ m {SiO_2}}^T = mathop smallint limits_{{r_{ m {Cu}}}}^{{r_{ m {SiO_2}}}} frac{{{ m d}x}}{{2pi {k_{ m {SiO_2}}}Hx}} = frac{{{ m {ln}}left( {{r_{ m {SiO_2}}}} ight) - { m {ln}}left( {{r_{ m {Cu}}}} ight)}}{{2pi {k_{ m {SiO_2}}}H}},$$  | (20) |
$$R_{ m {Si}}^T = mathop smallint limits_{{r_{ m {SiO_2}}}}^{{r_{ m {Si}}}} frac{{{ m d}x}}{{2pi {k_{ m {si}}}Hx}} = frac{{{ m {ln}}left( {{r_{ m {Si}}}} ight) - { m {ln}}left( {{r_{ m {SiO_2}}}} ight)}}{{2pi {k_{ m {Si}}}H}}.,, $$  | (21) |
The thermal capacity of TSV is given as follows:
$${C^T} = alpha {c_{ m p}} V, $$  | (23) |
$$!!C_{ m {Cu}}^T = {alpha _{ m {Cu}}} {c_{ m {Cu}}} {V_{ m {Cu}}},$$  | (24) |
$$!C_{ m {SiO_2}}^T = {alpha _{ m {SiO_2}}} {c_{ m {SiO_2}}} {V_{ m {SiO_2}}},$$  | (25) |
$$!!!!!!!!C_{ m {Si}}^T = {alpha _{ m {Si}}} {c_{ m {Si}}} {V_{ m {Si}}}, $$  | (26) |
where α is the density of materials and cp is the specific heat capacity. The silicon substrate here is simplified as a transmission line, according to the properties of the transmission line, and the impedance of the silicon substrate can be written as[17]:
$$hspace*{fill}begin{split} Z_{ m {Si}}^T &= sqrt {R_{ m {Si}}^T/C_{ m {Si}}^T} tanh left( {sqrt {R_{ m {Si}}^TC_{ m {Si}}^T} left( {{r_{ m {Si}}} - {r_{ m {SiO_2}}}} ight)} ight) &= R_{ m {Si}}^Tleft( {{r_{ m {Si}}} - {r_{ m {SiO_2}}}} ight) - frac{1}{3}R_{ m {Si}}^{T2}C_{ m {Si}}^Tleft( {{r_{ m {Si}}} - {r_{ m {SiO_2}}}} ight)&quad + frac{2}{{15}}R_{ m {Si}}^{T3}C_{ m {Si}}^{T2}left( {{r_{ m {Si}}} - {r_{ m {SiO_2}}}} ight).end{split}hspace*{fill}tag{22}$$  | (22) |
According to Fig. 1, the input impedance of TSV is given by:
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Figure1.
(Color online) 3D view of the TSV cell with copper core, insulation layer and silicon region.
$$Z_{ m {in}}^T = frac{1}{{C_{ m {cu}}^T +displaystyle frac{1}{{R_{ m {cu}}^T + displaystyle frac{1}{{C_{ m SiO_2}^T + displaystyle frac{1}{{Z_{ m {Si}}^T + R_{ m SiO_2}^T}}}}}}}}.$$  | (27) |
$${T^{{ m tsv}}} = Z_{ m {in}}^T P.$$  | (28) |
Therefore, the temperature of TSV considering the thermal effects of both the lateral and vertical direction, can be given by:
$${T^{{ m tsv}}} = frac{{ - C_{ m {Cu}}^T + sqrt {C{{_{ m {Cu}}^T}^2} + 4 left( {frac{{C_{ m {Cu}}^T}}{{P left( {R_{ m {SiO}_2}^T + Z_{ m {Si}}^T} ight)}} + frac{{C_{ m {Cu}}^T C_{ m {SiO}_2}^T}}{P}} ight) {{P}}} }}{{2 ,, left( {frac{{C_{ m {Cu}}^T}}{{P left( {R_{ m {SiO}_2}^T + Z_{ m {Si}}^T} ight)}} + frac{{C_{ m {Cu}}^T C_{ m {SiO}_2}^T}}{P}} ight)}}.$$  | (29) |
3.
Results and verification
Using the algorithm in our paper, we now compare the steady state temperature response of a TSV with COMSOL Multiphysics, as plotted in Fig. 4. Its geometry is described in Table 1. In the simulation, all lateral boundaries are assumed adiabatic. The natural convection h = 10 W/(m2·K) is set to the top surface, and the bottom surface is fixed at room temperature T0 = 293.15 K. The temperature distribution of 293.15 K is set for the initial condition. In Fig. 4 the blue line shows the simulated thermal response, the black line shows the model before electrical-thermal coupling, and the red dash line shows the calculated result from the coupled model.
| Material | Cu | SiO2 | Si |
| K (W/°C·m) | 398 | 1.4 | 129 |
| A (kg/m3) | 8700 | 2200 | 2329 |
| Cp (J/°C·kg) | 390 | 730 | 700 |
| R (μm) | 3 | 3.1 | 15 |
| H (μm) | 40 | 40 | 40 |
| ρ (Ω/m) | 1.75 × 10?8 | – | 2.52 × 10?4 |
Table1.
Thermal parameters and structure parameters of TSV.
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| Material | Cu | SiO2 | Si |
| K (W/°C·m) | 398 | 1.4 | 129 |
| A (kg/m3) | 8700 | 2200 | 2329 |
| Cp (J/°C·kg) | 390 | 730 | 700 |
| R (μm) | 3 | 3.1 | 15 |
| H (μm) | 40 | 40 | 40 |
| ρ (Ω/m) | 1.75 × 10?8 | – | 2.52 × 10?4 |
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Figure4.
(Color online) Comparison of the coupling model, non-coupling model and the simulated data.
In Fig. 4 the following can be observed. (1) The model without coupling deviates from the measured data, because it is not considering the variation of resistance with temperature, and it neglects the electrical–thermal coupling effects. (2) Electrical–thermal coupling model of TSV significantly increases the accuracy of the TSV temperature response model. The rise of temperature degrades the current due to larger TSV resistance, and the decrease of the current reduces the temperature. The comparison between the results of the proposed analytical formulas and COMSOL shows that the proposed formulas have very high accuracy with a maximum error of 0.1%. The run time to evaluate the temperature of TSV considering the electrical–thermal coupling effects for COMSOL is up to 300 s compared to less than 1 s using the proposed model. Fig. 5 shows the 3D thermal image of the TSV with a uniform substrate temperature simulated with COMSOL.
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Figure5.
(Color online) Three-dimensional temperature distribution over the TSV.
Based on the proposed model, the electrical-thermal performances on different TSV sizes are discussed in this section.
We tune the metal diameter to be 2, 3, 4, 5 μm. Temperature results are summarized in Fig. 6. It is shown that the temperature increases as the metal diameter ramps up. The temperature is increased by 12 K at the TSV center as the metal diameter varies from 2 to 5 μm. Therefore, with the increase of the radius of the TSV, the resistance decreased and the temperature can be increased. This is because, as shown in Eqs. (3) and (6), the radius of the TSV is inversely proportional to its resistance but is proportional to its power. With the permission of the process, a small TSV radius is better for the electrical-thermal coupling effect in 3D IC.
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Figure6.
(Color online) Temperature versus TSV diameter.
Fig. 7 summarizes the influence of dielectric thicknesses on temperature. The dielectric thickness is varied from 50, 100, 200, 500 nm. The temperature is increased by 17 K at the TSV center as the dielectric thicknesses varies from 50 to 500 nm. As shown in Fig. 7, the thicker the dielectric layer, the higher the temperature. The reason is that the thermal conductivity of silicon oxide is much smaller than that of silicon and the dielectric layer blocks the heat dissipation. It should be emphasized that, although the thinner the insulator layer induces more thermal dissipation of the TSV, since the insulator layer is mainly used for electrical insulation, it cannot be too thin.
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Figure7.
(Color online) Temperature versus dielectric thickness.
The various TSV conductor materials impact on the temperature state is also studied. Fig. 8 gives the results as TSV conductor material is changed from Cu, Al to W. It is found that, compared with the W metal, the Al enlarges the temperature by 14 K, and the Cu case enlarges the temperature by 12 K. The main reason for this behavior is that, the thermal conductivity of W, Cu and carbon nanotube are 237, 398, and 6000 W/(m·K), respectively. Therefore, as shown in Eq. (19), the temperature decreases as thermal conductivity increases.
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Figure8.
(Color online) Temperature versus TSV conductor material.
4.
Conclusion
This paper presents the blended electrical-thermal coupling model of TSV, the model considers both the effect of lateral thermal resistance and the vertical thermal resistance. Accurate analytical models for the electrical-thermal coupling are presented and verified by COMSOL. It is shown that the comparison between the results of the proposed analytical formulas and COMSOL shows that the proposed formulas have very high accuracy with a maximum error of 0.1%. Based on the analytical model, the thermal performance impacts of various TSV configurations are evaluated, the relationship among temperature, thickness of dielectric, radius of TSV, and conductor materials of TSV are addressed. The design guidelines of TSV are also given as: (1) the increase of the radius of the TSV, the resistance decreases and the temperature can be increased; (2) the thicker the dielectric layer, the higher the temperature; and (3) compared with carbon nanotube, the Cu enlarges the temperature by 34 K, and the W case enlarges the temperature by 41 K.
