1.School of Nano-Tech and Nano-Bionics, University of Science and Technology of China, Hefei 230026, China 2.Key Laboratory of Multifunctional Nanomaterials and Smart Systems, Suzhou Institute of Nano-Tech and Nano-Bionics, Chinese Academy of Sciences, Suzhou 215123, China
Fund Project:Project supported by the National Natural Science Foundation of China (Grant Nos. U1830112, 61774014), the Key Industry Technology Innovation Program of Suzhou, China (Grant No. SYG201848), and the Science and Technology on Monolithic Integrated Circuits and Modules Laboratory, Nanjing Electronic Devices Institute, China (Grant No. 6142803180407)
Received Date:05 December 2019
Accepted Date:12 February 2020
Published Online:05 May 2020
Abstract:As reported by several market analysts, GaN-based power devices show great potential applications in the low and medium voltage range ( < 900 V). For high voltage ( > 1200 V), including ship transportation and power grid, the future applications of GaN highly depend on the development of vertical devices based on GaN substrates. Several vertical devices have been reported, such as current aperture vertical electron transistors (CAVETs), U-shape trench metal-oxide-semiconductor field-effect transistors (UMOSFETs), and fin power transistors. And the UMOSFETs show potential advantages due to greater simplicity in material epitaxy and fabrication process. In the fabrication of UMOSFETs, the U-shape trench dry etching is the most critical process. The GaN sidewalls after dry etching directly affect the interface state characteristics in the MOS structure and the channel electron transport. In this work, etching optimization including etching radio-frequency (RF) power and etching mask is investigated and process-dependent electrical characteristics of GaN UMOSFETs are also studied. The appropriate decrease of RF power ensuring the steep sidewalls can effectively improve the channel electron mobility from 35.7 cm2/(V·s) to 48.1 cm2/(V·s) and consequently increase the ON-state current and reduce the ON-state resistance. Larger etching damage to the p-GaN sidewall caused by higher RF power leads the scattering effects to increase and the mobility of the channel carriers to decrease. The interface state density at the channel can be extracted by the subthreshold swing. The interface state density decreases to 1.90 × 1012 cm–2·eV–1 when the RF power is regulated to 50 W, which is only half of the interface state density when RF power is 135 W. Similar breakdown voltages (350－380 V) are measured for these devices with varying RF power, which are governed by gate early breakdown. Positive valence band offset is formed in the SiO2/GaN MOS structure and the early breakdown occurs due to the holes accumulating at the SiO2/GaN interface. The etching uniformity at the bottom of U-shape trench can be improved by using the SiO2 hard masks instead of photoresist masks. Sub-trenches at both ends of the trench bottom are observed in the device with photoresist masks, leading the carrier scattering to increase and ON-state current to decrease. Besides, the interface state density decreases from 3.42 × 1012 cm–2·eV–1 to 2.46 × 1012 cm–2·eV–1 with a SiO2 hard mask layer used. Compared with 1.6 μm photoresist mask, the thinner SiO2 mask with a thickness of 500 nm has a small sidewall area, which weakens the high-energy ion reflection in the inductively coupled plasma system. Consequently, the over-etching at the bottom ends of the trench is improved significantly and therefore the fabricated GaN UMOSFET has higher channel mobility and a lower interface state density. Keywords:GaN vertical trench metal-oxide-semiconductor field-effect transistor/ U-shape trench/ radio-frequency power/ etching mask
为了探究采用不同刻蚀掩模的两种器件表现出上述不同电学特性的原因, 刻蚀后的样品经过原子力显微镜(AFM)来评价刻蚀形貌. 图4(a)显示了不同刻蚀掩模相对应的沟槽形貌, 选取的沟槽形貌同为宽度约8 μm, 刻蚀深度约800 nm, 可以看出采用光刻胶的样品在沟槽底部两端处出现了明显的过刻蚀现象, 即微沟槽效应, 刻蚀后沟槽底部呈现中间高两边低的“凸”字型形貌, 图5是光刻胶做刻蚀掩模的样品U型槽区域的扫描电子显微镜(SEM)图像. 这种U型槽形貌会导致器件在导通时, 载流子流经器件积累区受到的散射作用更大, 从而降低器件的工作电流. 图 4 (a)采用不同刻蚀掩模后U型槽的刻蚀形貌; (b)刻蚀掩模侧壁的高能粒子反射现象 Figure4. (a) Etching morphology of the U-shape trench using different etching masks; (b) high-energy ion reflection at the sidewall of etching masks.
图 5 光刻胶掩模的样品经U型槽刻蚀后的SEM图像 Figure5. SEM image of U-shape trench after dry etching with photoresist etching mask.
图 1 GaN垂直型UMOSFET器件示意图
图 2 干法刻蚀RF功率为50, 75和135 W制备出GaN UMOSFET器件的电学特性曲线(IGS和IDS分别指栅电流和漏电流) (a)转移特性曲线; (b)沟道场效应迁移率随栅电压VGS的变化曲线; (c)亚阈值特性; (d) RF功率50 W的器件三端击穿特性
图 3 采用光刻胶和SiO2作为刻蚀掩模制备出的GaN UMOSFET器件的电学特性曲线 (a)转移特性曲线; (b)沟道场效应迁移率随栅电压的变化曲线; (c)输出特性曲线; (d)亚阈值特性
图 4 (a)采用不同刻蚀掩模后U型槽的刻蚀形貌; (b)刻蚀掩模侧壁的高能粒子反射现象
图 5 光刻胶掩模的样品经U型槽刻蚀后的SEM图像