1.Key Laboratory of Nanophysics and Device, Institute of Physics, Chinese Academy of Sciences, Beijing 100190, China 2.University of Chinese Academy of Sciences, Beijing 100049, China
Fund Project:Project supported by the National Key Technology Research and Development Program of the Ministry of Science and Technology of China (Grant No. 2016YFA0301701) and the National Nature Science Foundation of China (Grant Nos. 11574356, 11434010)
Received Date:16 September 2019
Accepted Date:11 October 2019
Published Online:20 January 2020
Abstract:Controllable growth of nanowires is a prerequisite for addressability and scalability of nanowire quantum devices. By combining top-down nanofabrication and bottom-up self-assembly, site-controlled GeSi nanowires with two (105) facets can be grown on Si (001) substrate with pre-patterned trenches. Trenches along the [100] or [010] crystallographic direction with 60 nm in width and 6 nm in height are fabricated on Si substrate by electron beam lithography and reactive ion etching. Subsequently, a 60-nm-thick Si buffer layer is grown at 330–400 ℃ on the patterned substrate to improve the surface quality. The facets at the tip of the trenches transform into (11n) after depositing the Si buffer layer. Self-organized GeSi nanowires form inside the trenches by depositing the 6-nm-thick Si67Ge33 film at 450 ℃ followed by 1 h annealing at 510 ℃. The GeSi nanowires are (105)-faceted with an average height of approximately 7 nm. Furthermore, we systematically study the influence of annealing temperature, Ge concentration and pattern period on the formation of site-controllable GeSi nanowire on a patterned Si (001) substrate. The GeSi nanowires can be formed only inside the trenches within a specific annealing temperature ranging from 500 ℃ to 520 ℃. It is also discovered that GeSi nanowires are very sensitive to Ge concentration, as they cannot form at lower Ge concentration due to a large nucleation energy barrier. In contrast, high Ge concentration will lead to the discontinuity of nanowires caused by higher atomic diffusion barrier. The generated GeSi nanowires in the trenches exhibit similar dimensions at different pattern periods, which indicates that the growth process is thermodynamically determined. Overall, we realize the controllable growth of the GeSi nanowires, while the length of nanowires can reach the millimeter even centimeter scales, replying on the patterned trench length. The above results offer a controllable growth method of the Ge nanowires, which could potentially lead to the scalability of the Ge quantum devices on Si substrates. Keywords:molecular beam epitaxy/ qubit/ patterned substrate/ GeSi nanowires
采用电子束曝光技术和反应离子刻蚀技术, 在硅(001)衬底上获得了周期性排列的凹槽. 图形衬底表面的原子力显微镜图(AFM)如图1(a)所示, 凹槽尺寸均匀, 其宽度为60 nm, 深度为6 nm, 长度为2 μm, 周期为1 μm, 凹槽沿[100]或[010]方向. 硅图形衬底经过RCA(Radio Corporation of America)清洗[29]之后, 首先用5%的氢氟酸浸泡1 min, 去掉表面的二氧化硅层, 同时在硅表面形成氢钝化层, 经过在进样腔预烘烤后传入IV族MBE生长腔, 然后升温至720 ℃保持8 min, 去除硅片表面的氢原子钝化层, 最后在330 ℃到400 ℃以1 ?/s的速率生长60 nm的硅缓冲层, 修复微纳加工引入的缺陷. 硅缓冲层的AFM图如图1(b)所示, 其深度变为约4 nm, 但是宽度却大幅度增加, 变为约160 nm. 此外, 从图1(b)的插图可以看出, 沉积硅缓冲层后, 凹槽末端由原来的无明显取向(如图1(a)插图所示)变为了沿$ [1\;\bar1\;0] $与[1 0]两个垂直方向, 这是由于硅缓冲层的沉积导致凹槽末端晶面向硅的稳定晶面{11n}[30]演化, 从而使凹槽末端侧壁沿$ [1\;\bar1\;0] $与[1 0]方向, 这些结果与之前的研究结果一致[25]. 图 1 生长硅缓冲层前(a)和生长硅缓冲层后(b)硅周期性凹槽结构的表面AFM图, 插图分别为生长硅缓冲层前后凹槽末端的放大图 Figure1. AFM image of the trench-patterned Si substrate before (a) and after (b) the growth of Si buffer layer, insets are the zoom-in images of one end of a trench before and after the Si buffer layer, respectively.
22.2.有序锗硅纳米线的生长 -->
2.2.有序锗硅纳米线的生长
沉积完上述硅缓冲层后, 将衬底温度升至450 ℃, 继续沉积6 nm的Si67Ge33合金薄膜, 然后将衬底温度升至510 ℃, 原位退火1 h, 在图形衬底上获得了面内有序排列的锗硅纳米线, 其表面AFM图如图2(a)所示, 纳米线在面内排列整齐, 尺寸均匀, 图2(b)与图2(c)分别为单根纳米线的AFM图以及表面线扫描图, 由图可知, 纳米线位于凹槽底部, 其横截面为三角形, 高度约为7 nm, 侧壁倾角为11.3°, 因此纳米线具有两个稳定的(105)晶面. 图 2 (a)硅衬底上有序锗硅纳米线的AFM图; (b)单根锗硅纳米线的AFM图; (c)单根纳米线的表面线扫描图, 图中标尺均为500 nm Figure2. (a) AFM image of ordered GeSi wires on trench patterned substrate; (b) AFM image of zoom-in individual GeSi nanowire; (c) AFM linescan along the cross-section of a GeSi nanowire. Inset scale bar: 500 nm.
图 1 生长硅缓冲层前(a)和生长硅缓冲层后(b)硅周期性凹槽结构的表面AFM图, 插图分别为生长硅缓冲层前后凹槽末端的放大图
图 2 (a)硅衬底上有序锗硅纳米线的AFM图; (b)单根锗硅纳米线的AFM图; (c)单根纳米线的表面线扫描图, 图中标尺均为500 nm
图 3 在硅凹槽结构图形衬底上沉积4 nm的Si67G33薄膜, 然后在不同温度退火后得到的样品表面AFM图 (a) 450 ℃; (b) 500 ℃; (c) 510 ℃; (d) 520 ℃; (e) 530 ℃; (f) 550 ℃
图 4 固定薄膜厚度时, 锗的含量比例对纳米线结构的影响 (a) Si68G32; (b) Si66G34; (c) Si63G37
图 5 不同周期图形衬底上锗硅纳米线的表面AFM图 (a)周期为2 μm; (b)周期为500 nm