1.School of Science, Harbin Institute of Technology (Shenzhen), Shenzhen 518055, China 2.Key Laboratory of Micro-Nano Optoelectronic Information System of Ministry of Industry and Information Technology, Harbin Institute of Technology (Shenzhen), Shenzhen 518055, China
Fund Project:Project supported by the Young Scientists Fund of the National Natural Science Foundation of China (Grant No. 61604049), the Shenzhen Overseas High-Caliber Personnel Technology Innovation Project, China (Grant No. KQJSCX20170726104440871), and the Startup Funding of Shenzhen, China
Received Date:14 June 2019
Accepted Date:29 October 2019
Available Online:01 January 2020
Published Online:20 January 2020
Abstract:The electrical performance and the long-term reliability of GaN-based high electron mobility transistors (HEMTs) are greatly affected by the Joule self-heating effect under high power density operation condition. Measurement of the junction temperature and analysis of the thermal resistance of the constituent layers including the packaging material are critically important for thermal design and reliability assessment of GaN-based HEMTs. In this paper, Raman thermometry combined with the finite element thermal simulation is used to compare the junction temperature and the thermal resistance of a GaN HEMT mounted on a novel Cu/graphite composite flange with those of a conventional CuMo flanged device. The results show that the junction temperature of the Cu/graphite flanged device is 15% lower than that of the CuMo flanged device at a power dissipation of 1.43 W/mm, while the overall device thermal resistance is 18.7% lower in the Cu/graphite flanged device. In addition, the temperature distributions of each layer along the cross-plane direction are analyzed for the two devices; the thermal resistance ratio of the Cu/graphite flange is 40% of the overall device thermal resistance, while the CuMo flange account for 53% of the overall thermal resistance of the device. This proves the effectiveness and benefit of using the Cu/graphite composite material package of high thermal conductivity to improve the heat dissipation of GaN HEMTs. By tuning the mass fraction of the graphite, it is possible to further increase the thermal conductivity of the Cu/graphite composite flange and to further reduce the device thermal resistance. It is observed in the Raman thermal measurement that the highest thermal resistance after flanging is the interfacial thermal resistance between the GaN epitaxial layer and the SiC substrate (~50 m2·K/GW). For obtaining the better thermal characteristics of the GaN HEMT, it is crucial to reduce the GaN/SiC interfacial thermal resistance through interface engineering during the epitaxial growth. In the meantime, Raman thermometry combined with the finite element thermal simulation is demonstrated to be an effective method for implementing the thermal characterization of the GaN-based devices and the constituent material layers, and the principle and procedure of the method are described in detail in the paper. Keywords:GaN high electron mobility transistor/ thermal resistance/ Cu/graphite flange/ Raman thermometry
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--> --> --> 1.引 言GaN基高电子迁移率晶体管(HEMT)得益于其高频率响应和高击穿电压特性, 成为高频和高功率等领域应用的有力竞争者[1-6]. 近年来, GaN晶体管的功率密度得到显著的提高[7], 高功率密度会在器件沟道内产生大量的焦耳热[8], 使得GaN器件的可靠性和器件性能降低[9-11]. 因此GaN器件的热管理问题成为限制其在大功率、高频率等领域应用进一步发展的重要原因之一, 也成为目前针对GaN器件可靠性方面的研究焦点[12,13]. GaN器件的工作结温由从外延层、成核层和衬底层到芯片黏连层、法兰封装材料等各层材料的热扩散性能决定. 因此, 准确表征各层材料在器件中的热阻占比对器件热设计和可靠性评估非常重要. 在上述各层热阻中, GaN器件的近结热阻受到材料本征热输运性质以及器件对材料厚度要求的限制, 但可以通过成核层材料的生长条件调控GaN外延与衬底间的界面热阻[14]. 另一方面, 可以通过使用更高热导率的法兰材料减小封装部分的热阻, 例如石墨与铜形成的复合材料具有与半导体材料相近的热膨胀系数、较低的密度及较高的热导率[15,16]. 其中, 采用放电等离子或热压烧结制备出的铜/石墨复合材料的热导率可达300—400 W/(m·K)[15,16], 被视为非常有潜力的电子封装材料. 本文通过拉曼热测量技术准确表征了热压烧结法制备的铜/石墨复合物法兰封装的GaN场效应管在不同功率下的结温, 结合拉曼热测试与有限元热仿真结果的比对分析得到GaN器件的各层热阻, 并与由传统铜钼法兰封装的GaN器件进行对比. 结果发现由高热导率铜/石墨复合物法兰封装的GaN器件的整体热阻比由铜钼法兰封装的GaN电子器件的整体热阻低18.7%, 从器件层面证明使用铜/石墨法兰封装降低GaN器件热阻、提高热扩散能力的可行性. 同时, 本文也阐明应用拉曼热测量技术结合热仿真模型分析GaN电子器件各部分热阻的具体方法和独特优势. 2.GaN器件信息和拉曼热测量技术本文测量的器件是以SiC为衬底的GaN基微波晶体管, AlGaN/GaN外延的厚度为1.2 μm, SiC衬底的厚度为100 μm, 在SiC衬底和GaN外延之间有20 nm的AlN成核层. 铜/石墨法兰是以天然鳞片石墨粉和纯铜粉为原料, 通过真空热压烧结制备而成, 法兰厚度为1 mm, 用激光闪射法导热仪测量的热导率为300 W/(m·K), 而对比器件的封装是传统常用的铜钼法兰, 热导率为167 W/(m·K). 在法兰和SiC衬底之间有12 μm的AuSn合金黏附层. 被测器件的结构示意图如图1(a)所示. 器件单指栅宽300 μm, 总栅宽19.2 mm, 栅极间距为38 μm和82 μm交替排列. 虽然不同测试方法的测量机理不同, 测量结果会有差异[17]. 但GaN电子器件的焦耳自生热主要产生在栅极脚下靠近漏极一侧的狭小空间内, 通常只有微米尺度. 因此在现代GaN电子器件热阻的表征手段中, 具有较高空间分辨率的拉曼热测量和热成像技术是相对较为成熟且准确性相对较高的方法[17-21]. 图 1 (a)被测GaN高电子迁移率场效应管器件结构以及拉曼热测量的示意图; (b)被测器件在50 ℃和300 ℃的拉曼特征峰: 包括GaN外延的E2(high)和A1(LO)峰, 以及SiC衬底的FTO峰 Figure1. (a) Schematic structure of the GaN-on-SiC HEMT under test in the Raman optothermal measurement; (b) Raman peaks of the GaN-on-SiC HEMT at 50 ℃ and 300 ℃, including the E2(high) and A1(LO) peaks of the GaN epitaxy and the FTO peak of the SiC substrate.
如图1(a)所示, 由于拉曼热测量技术中所使用的532 nm激光可以穿透同为宽禁带半导体的GaN和SiC, 而且拉曼光谱具有材料选择性, 因此被测器件GaN外延层和SiC衬底层的拉曼峰信息可被同时提取. 测量时激光透过数值孔径NA = 0.5的物镜, 聚焦在器件栅极脚下靠近漏极的一侧的AlGaN/GaN表面, 该区域电场强度最高, 为沟道内温度最高的区域. 拉曼热测量技术的原理是利用被测材料的拉曼特征峰具有温度依赖性, 这是晶格常数随着温度变化而改变, 而相应的声子振动模式的频率随之改变产生的. 对GaN和SiC来讲, 这种温度依赖性在室温以上是线性的, 即GaN和SiC的拉曼特征峰会随着温度的升高呈现线性的偏移[22], 通过偏移的波数值可以得到材料的温度升高值. 图1(b)为被测器件在50 ℃和300 ℃下的拉曼光谱, 包括GaN外延的E2(high)和A1(LO)峰, 以及SiC衬底的FTO峰, 可以看到GaN和SiC的特征峰随着温度升高发生红移. 为准确表征器件沟道和衬底上表层的温度, 首先对器件中GaN和SiC的温度系数进行校准. 在校准的过程中使用高精度温控台严格控制器件的温度, 从室温开始, 每升高25 ℃测量1次GaN和SiC的拉曼特征峰, 直到300 ℃. 图2(a)和图2(b)分别显示了被测器件GaN A1(LO)峰和SiC FTO峰位置随温度变化的关系, 通过线性拟合得到GaN A1(LO)峰的温度系数为–0.026 cm–1·K–1, SiC FTO峰的温度系数为–0.023 cm–1·K–1. 图 2 (a) GaN A1(LO)拉曼峰随温度的变化关系, 线性拟合得到的温度系数为–0.026 cm–1·K–1; (b) SiC FTO拉曼峰随温度的变化关系, 线性拟合得到的温度系数为–0.023 cm–1·K–1 Figure2. (a) Position of the GaN A1(LO) Raman peak as a function of temperature. The temperature coefficient from the linear fit is –0.026 cm–1·K–1; (b) position of the SiC FTO Raman peak as a function of temperature. The temperature coefficient from the linear fit is –0.023 cm–1·K–1.
得到校准的温度系数后, 测量器件在不同功率工作状态下GaN A1(LO)峰和SiC FTO峰的偏移. 由于器件的生热量随功率密度成正比例增加, GaN和SiC相应位置的温度也随功率密度的增加而升高, 造成的拉曼峰移随功率密度的线性关系的斜率称为GaN A1(LO)峰和SiC FTO峰的功率系数. 我们使用双通道直流电源分别给GaN器件的栅-源两极和漏-源两极之间施加电压, 用万用表测量漏极电流. 从器件关断状态(栅极负压)开始, 功率密度大约每增加0.3 W/mm需多次测量GaN A1(LO)峰和SiC FTO峰的峰位. 多次测量是为了尽可能的减少测量的不确定性, 提高测量准确度. 整个测量过程中将热电偶放置在电路板上靠近器件工作区域的位置, 测得的不同功率密度下的板温作为器件封装法兰背板的温度. 图3(a),(b)分别显示了被测器件GaN A1(LO)峰、SiC FTO峰随着功率密度升高的偏移, 通过线性拟合得到GaN A1 (LO)峰的功率系数为 –1.86 cm–1·mm/W, SiC FTO峰的功率系数为 –1.25 cm–1·mm/W. 图 3 (a) GaN A1(LO)拉曼峰随器件功率密度的变化关系, 线性拟合得到的功率系数为–1.86 cm–1·mm/W; (b) SiC FTO拉曼峰随器件功率密度的变化关系, 线性拟合得到的功率系数为–1.25 cm–1·mm/W的功率系数 Figure3. (a) Position of the GaN A1(LO) Raman peak as a function of the device power density. The power density coefficient from the linear fit is –1.86 cm–1·mm/W; (b) position of the SiC FTO Raman peak as a function of the device power density. The power density coefficient from the linear fit is –1.25 cm–1·mm/W.
表1两种铜基法兰封装GaN器件的热阻对比 Table1.Thermal resistance of GaN HEMT with different Cu-based flange materials.
图 4 (a)铜/石墨法兰封装器件GaN层、SiC上表层和封装法兰的温度随功率密度的变化; (b)铜/石墨法兰封装器件GaN层和SiC上表层的温度差、GaN层和封装法兰之间的温度差随功率密度的变化; (c)铜钼法兰封装器件GaN层、SiC上表层和封装法兰的温度随功率密度的变化; (d)铜钼法兰封装器件GaN层和SiC上表层的温度差、GaN层和封装法兰之间的温度差随功率密度增加的变化 Figure4. (a) Measured temperature of GaN, SiC, and the Cu/graphite flange as a function of the device power density; (b) temperature differences between GaN and SiC, and between GaN and and the Cu/graphite flange as a function of the device power density; (c) measured temperature of GaN, SiC, and the CuMo flange as a function of the device power density; (b) temperature differences between GaN and SiC, and between GaN and and the CuMo flange as a function of the device power density.
表2有限元热仿真分析中使用的各层材料的尺寸及热导率 Table2.Dimensions and thermal conductivity of each layer in the GaN-on-SiC HEMT used in the finite element device thermal simulation.
图 5 (a)铜/石墨法兰封装的GaN器件的GaN外延和SiC衬底上表层温度的模拟值(线)和实测值(点); (b)铜钼法兰GaN电子器件的结温和SiC衬底上表层温度的模拟值和实测值的对比; (c) 1.43 W/mm功率密度下铜/石墨法兰和铜钼法兰封装GaN器件在垂直器件表面方向上的温度分布; (d)铜/石墨法兰和铜钼法兰封装GaN器件各层材的热阻占比(其中TBR的材料为AlN) Figure5. (a) Simulated (line) and measured (dot) junction temperatures of the Cu/graphite flanged device; (b) simulated (line) and measured (dot) junction temperatures of the CuMo flanged device; (c) depth wise temperature distribution of the Cu/graphite flanged device and the CuMo flanged device at the power density of 1.43 W/mm; (d) thermal resistance of each layer within the Cu/graphite flanged device and the CuMo flanged device (The material of TBR is AlN).