学位课程 面向微电子、电子工程、计算机等专业 课程性质是以功能IP核为基础的系统模块和电路综合的技术的研究。 其任务是以IP核为基础，以硬件描述语言为系统功能的主要描述手段，借 助以计算机为平台的EDA工具来进行，用HDPLD或ASIC为物理载体来实现系统芯片级的设计。

With VLSI technology as the base, computer science and technology as the core and HDL (VHDL, Verilog HDL, SystemC) and EDA as the tools, this course studies the principle and technology of IP core design and systematic design of IS (Integrated System). IP core plays an essential role in the research and application of SOC (System on Chip), while the research of IS includes system module based on functional IP core and circuit synthesis.The ideology of IS designing is quite different from that of traditional IC, which tends to implement functions of the whole system on one or several chips which integrate the processor, algorithmes, architectures, circuits of different levels and components, even MEMS . The design of IS (Integrated System) is executed on the basis of IP core, with HDL as the main method of systematic function description and by virtue of EDA tools on the computer platform. The design of traditional electrical system emphasize on the rational connection of various apparatus on PCB . However, IS (Integrated System) mainly refers to the design of system chips, using HDPLD or ASIC as its physical carrieres. The products come into being after verification of the steps mentioned above are called ‘firm core’ or ‘hard core’, which can be delivered in the form of software. The content of this course includes: description and modeling in the Behaeviodomain and Architeture domain of IS (Integrated System), Ssystematic Co-disgin and Synthesis, Systematic mensurablity disgin .