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摘要地震数据采集系统自检时需要总谐波失真小于 -106 dB的高保真正弦信号,一般采用24位ΔΣ数模转换器来产生,关键技术是如何生成驱动ΔΣ数模转换器的位流。该文提出一种由正弦数据存储器、插值滤波器和ΔΣ调制器组成的位流生成器,重点介绍了插值滤波器和ΔΣ调制器的设计思路、仿真方法及其在现场可编程门阵列(FPGA)中借助DSP Builder工具实现的方法。实测结果表明: 该位流生成器可以驱动一块ΔΣ数模转换器产生31.25 Hz、 峰峰值3.96 V的高保真正弦信号,信噪比达到111.4 dB, 总谐波失真达到-121.0 dB, 满足地震数据采集系统自检的要求,并且具有结构简单、可编程和开发周期短的优势。 | |||
关键词 :地震数据采集,正弦信号发生器,ΔΣ调制器,现场可编程门阵列(FPGA) | |||
Abstract:A 24-bit sigma-delta digital-to-analog converter (DAC) is used to produce high precision sinusoidal signals with low total harmonic distortion (usually less than -106 dB) for seismic data acquisition system self-tests. The key problem is to convert the sinusoid to a sigma-delta bit stream to drive the sigma-delta DAC. This paper presents a field-programmable gate array (FPGA) based bit stream generator which is composed of a sinusoidal data memory, an interpolation filter and a sigma-delta modulator. This paper focuses on the design and simulation methods for the interpolation filter and the sigma-delta modulator and the whole system implementation using the DSP Builder in FPGA. Tests show that the bit stream generator can drive a 24-bit sigma-delta DAC to produce a 31.25 Hz, 3.96 V peak-peak voltage sinusoidal signal with -121.0 dB total harmonic distortion and 111.4 dB signal-to-noise ratio, which meets the needs for seismic use. The design is simple, programmable and easy to implement. | |||
Key words:seismic data acquisitionsinusoidal signal generatordelta-sigma modulatorfield-programmable gate array (FPGA) | |||
收稿日期: 2013-05-23 出版日期: 2015-04-16 | |||
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引用本文: |
彭卓, 邓焱, 马骋, 熊剑平, 尹永利. 基于FPGA的高精度正弦信号发生器设计与实现[J]. 清华大学学报(自然科学版), 2014, 54(2): 197-201. Zhuo PENG, Yan DENG, Cheng MA, Jianping XIONG, Yongli Yin. FPGA based high precision sinusoidal signal generator. Journal of Tsinghua University(Science and Technology), 2014, 54(2): 197-201. |
链接本文: |
http://jst.tsinghuajournals.com/CN/或 http://jst.tsinghuajournals.com/CN/Y2014/V54/I2/197 |
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