谢生1,闵闯1,魏恒2,毛陆虹3,杜永超1
AuthorsHTML:谢生1,闵闯1,魏恒2,毛陆虹3,杜永超1
AuthorsListE:Xie Sheng1,Min Chuang1,Wei Heng2,Mao Luhong3,Du Yongchao1
AuthorsHTMLE:Xie Sheng1,Min Chuang1,Wei Heng2,Mao Luhong3,Du Yongchao1
Unit:1. 天津大学微电子学院,天津 300072;
2. 中国电子科技集团第五十四研究所,石家庄 050000;
3.天津大学电气自动化与信息工程学院,天津 300072
Unit_EngLish:1. School of Microelectronics,Tianjin University,Tianjin 300072,China;
2. The 54th Research Institute of China Electronics Technology Group Corporation,Shijiazhuang 050000,China;
3. School of Electrical and Information Engineering,Tianjin University,Tianjin 300072,China
Abstract_Chinese:为更好地屏蔽探测器结电容、适配先进工艺节点的低电源电压,对共栅级放大器进行改进,提出一种带有源反馈结构的共栅级跨阻放大器,降低了电压余度消耗并有效提升带宽.在此基础上,采用TSMC 40nm CMOS工艺,设计一款速率为25Gb/s的伪差分光接收机模拟前端电路.该电路包括跨阻放大器、限幅放大器、直流偏移消除电路和输出缓冲级.其中,跨阻放大器采用带有源反馈结构的共栅级放大器,限幅放大器利用交错式有源反馈结构来提高电路带宽内的幅频响应平坦度,fT倍频器作为阻抗匹配的输出缓冲级.仿真结果表明,在电源电压0.9V,探测器结电容等效值为150fF的情况下,光接收机模拟前端电路的跨阻增益为59.6dBΩ,-3dB带宽为20.8GHz,功耗为46.6mW,芯片核心面积为600m×440m.
Abstract_English:In this paper,a common-gate transimpedance amplifier(TIA)with an active feedback structure is proposed to effectively reduce voltage redundancy and increase bandwidth,shield the junction capacitance of a photodiode(PD),and adapt to a low supply voltage under an advanced process node. On the basis of the proposed structure,a pseudo-difference optical receiver analog front-end circuit with a rate of 25Gb/s is designed using the TSMC 40nm CMOS process. The optical receiver circuit includes a TIA,a limiting amplifier,a DC offset cancellation circuit,and an output buffer stage. The TIA adopts the common-gate amplifier with an active feedback structure. The limiting amplifier adopts an interleaved active feedback structure to improve the amplitude-frequency response flatness within the interested bandwidth,and the fT frequency multiplier serves as an output buffer stage to match the output impedance. Post-layout simulation results show that the designed analog front-end circuit has a ?3dB bandwidth of 20.8GHz with a transimpedance gain of 59.6dBΩ while using a supply of 0.9V and a PD capacitance of 150fF. The power consumption is 46.6mW,and the core size of the chip is 600m×440m.
Keyword_Chinese:跨阻放大器;共栅级跨阻放大器;光接收机;CMOS工艺
Keywords_English:transimpedance amplifier;common-gate transimpedance amplifier;optical receiver;CMOS technology
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基于40nm CMOS工艺的25Gb/s光接收机模拟前端电路设计
本站小编 Free考研考试/2022-01-16
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