Magnetoelectric spin–orbit logic

Nature, 565, 35–42 (2019)



In the last decade, transistor scaling has been enabled by direct improvements to the carrier transport and superior electrostatic control. Despite the successful scaling in the size of transistors, voltage and frequency scaling have slowed. In response, a considerable effort to invent, demonstrate and benchmark beyond-CMOS devices got underway.



Now, a scalable beyond-CMOS spintronic logic device is proposed by Sasikanth Manipatruni and co-workers from Intel Corporation, University of California, Berkeley and Lawrence Berkeley National Laboratory. The beyond-CMOS logic device, also called magnetoelectric spin–orbit (MESO) device, comprises two technologically scalable transduction mechanisms: ferroelectric/magnetoelectric switching and topological conversion of spin to charge. The device interfaces with electrical interconnects and is therefore charge-/voltage-driven and produces a charge/voltage output. It comprises a magnetoelectric switching capacitor, a ferromagnet and a spin-to-charge conversion module. When the input interconnect carries a current, an electric field is set up in the magnetoelectric capacitor. The resulting magnetoelectricity switches the ferromagnet in the determined direction. When a supply current is injected into the device, causing a flow of spin-polarized electrons from the ferromagnet into the spin–orbit-coupling (SOC) materials. Owing to SOC spin-to-charge transduction, a charge current is generated at the output. Hence, the input charge state is inverted by the MESO logic gate at the output. Magnetoelectric/ferroelectric switching is regarded as the most energy-efficient mechanism at room temperature that scales to lateral dimensions of 10 nm and retains a stable collective order parameter. The intrinsic switching energy for ferroelectric/magnetoelectric switching can approach 1 aJ/bit, which is around 30 times lower than the switching energy of advanced CMOS devices. For spin-to-charge conversion using inverse SOC, the efficiency improves with reducing the width of the magnet, which is a highly desirable scaling feature. In view of distinct advantages of superior switching energy, low switching voltage, and enhanced logic density, MESO logic may enable entirely new computer architectures that may avoid the trade-offs of the Turing and von Neumann architectures and of Amdahl’s law.



Jian Wang, Nan Zhou (Wuhan National Laboratory for Optoelectronics, School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan, China)



doi: 10.1088/1674-4926/40/2/020206






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Figure1.
MESO interconnect with cascaded gates.