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An investigation of the DC and RF performance of InP DHBTs transferred to RF CMOS wafer substrate

本站小编 Free考研考试/2022-01-01




1.
Introduction




In recent years, the heterogeneous integrated circuits (HI) concept has led to an increased interest in RF and mm-wave system-on-chip (SoC) applications[13]. In order to combine the advantages of both InP DHBT and standard CMOS technology, a 3D integration approach has been developed based on a transferred-substrate with BCB wafer bonding[4]. Using the process, several HI circuits have been realized and exhibit excellent performances[5].



Considering an InP DHBT device transferred to an RF CMOS wafer substrate, Fig. 1(b) gives the cross view of the device. As the substrate is changed, the loss silicon substrate would degrade the output performance of the device, hence traditional developed InP DHBT/HBT models cannot be used to the substrate transferred devices directly.



In order to have a detailed insight on the RF performance of an InP DHBT with the substrate transferred, a novel small-signal model for the silicon substrate transferred device is proposed in this work. An InP DHBT with one emitter finger, of 0.8 μm in width and 5 μm in length is manufactured employing the InP DHBT technology developed by the Science and Technology on Monolithic Integrated Circuits and Modules Laboratory in Nanjing, China. The device is further transferred to a standard 0.18 μm RF CMOS wafer for DC and RF performance investigation.




2.
Device structure and small-signal model development




The cross sections of the manufactured InP DHBT and the substrate transferred InP DHBT are given in Figs. 1(a) and 1(b), respectively. The small signal models with the RF parasitics of the two devices are also given. In the model topologies, Rbx, Rcx and Re are the terminal resistances of the base (B), collector (C) and emitter (E), respectively. Rbcx and Rbci are the extrinsic resistance and intrinsic resistance between base and emitter, respectively. Rbe is the B–E junction resistance. Cbcx and Cbci are the extrinsic capacitance and intrinsic capacitance of B–C, respectively. Cbe and Cce are the B–E and C–E capacitances, respectively. Rbi represents the intrinsic resistance of the base. Cad, Csub and Rsub are introduced to capture the RF CMOS wafer substrate capacitive and resistive losses. In the model topologies, Rbx, Rcx, Re, Rbi, Rsub, Cce, Cad and Csub are bias independent, but the other elements are bias dependent.






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Figure1.
(Color online) (a) Cross view of an InP DHBT and employed model topology with intrinsic and extrinsic parasitics and (b) proposed model topology and the cross view of the InP DHBT device transferred to RF CMOS wafer substrate.




The epitaxial layer transfer technology is developed by the Science and Technology on Monolithic Integrated Circuits and Modules Laboratory in Nanjing, China. The technology combines as InP-DHBT transferred process with a standard RF-CMOS process[6, 7]. The InP DHBT wafer is bonded to a temporary wafer (such as sapphire) with the device-side contacting to the carrier. The InP substrate is dissolved by HCl to expose the DHBT structures with temporary wafer, and stopping on the etch stop layer. After the etch stop layer is removed, a smooth surface is obtained. The InP DHBT epitaxial layer as thin as about 1 μm is then permanently bonded at the top of the Si CMOS surface by using benzocyclobutene (BCB) as adhesive layer[8]. After permanent bonding, the temporary wafer is removed. Finally, by ICP-RIE dry etching using SF6[9], vias are formed between the InP and RF-CMOS structures and electrically connected with a gold electroplating process.




3.
Device characterization





3.1
DC and low-frequency C–V characterizations




The DC and C–V performances of the device are carried on wafer using a keysight B1500 semiconductor analyzer. Fig. 2(a) shows the Gummel plots of the InP DHBT and the substrate transferred InP DHBT. From the Gummel plots, the turn-on voltages (VBE, on) of the substrate transferred at a collector-current density is higher than that of the InP DHBT by 31 mV, while the collector-current ideality factor (nc) of the two devices are the same (nc = 1.04). The base-current ideality factor (nb) of the substrate transferred InP DHBT is 1.663, which is higher than that of the InP DHBT (nb = 1.51). The current gain performance calculated as β = Ic/Ib is also given in Fig. 2, as the lower nb, the current gain of the substrate transferred InP DHBT is higher than that of InP DHBT.



The IcVce characteristics of the InP DHBT and the substrate transferred InP DHBT is shown in Fig. 2(b). As can be seen, the substrate transferred InP DHBT has higher knee and offset voltage than the InP DHBT, which can be attributed to the higher emitter/base turn-on voltage of the substrate transferred InP DHBT. We also observe a severe self-heating effect at high Ic in the substrate transferred InP DHBT, which could be caused by the increase of the thermal resistance caused by the BCB surrounding and the adhesion layer in the substrate.






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Figure2.
(Color online) (a) Gummel plots and (b) I–V characteristics of an InP DHBT and the substrate transferred InP DHBT. The emitter area for both of the devices is 0.8 × 5 μm2.




Fig. 3 gives the C–V characteristics of the InP DHBT and the substrate transferred InP DHBT. The total base-collector capacitance (Cbc = Cbci + Cbcx), the total base-emitter capacitance (Cbe = Cbei + Cbex) and collector-emitter capacitance (Cce) of the substrate transferred InP DHBT are higher than the corresponding capacitances measured from the InP DHBT device. As seen from Fig. 3, there are the differences of the capacitances ΔCbc = Cbc|InP_on_CMOS ? Cbc|InP = 3.3 × 10?15 F, ΔCbe = Cbe|InP_on_CMOS ? Cbe|InP = 4.6 × 10?15 F and ΔCce = Cce|InP_on_CMOS ? Cce|InP = 1.9 × 10?15 F at Vbe = 0 V between the substrate transferred InP DHBT and InP DHBT, which is consistent with the changes of the core InP DHBT device surrounded by the BCB and the additional substrate parasitics.






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Figure3.
(Color online) Comparison of the measured (a) Cce and Cbc versus Vce and (b) Cbe versus Vce characteristics of the InP DHBT and the substrate transferred InP DHBT. The emitter area for both of the devices is 0.8 × 5 μm2.





3.2
RF small-signal performance




The small-signal RF performance of the device is carried on wafer from 100 MHz to 66 GHz with 0.2 GHz steps using a vector network analyzer. A short-open-load-through (SOLT) calibration is used in the analyzer with off-wafer impedance standards. With on-wafer open/short calibration structures[10, 11], parasitic pad inductances and capacitances are de-embedded from the measured S-parameters.



The measured results of the two devices biased at Ib = 100 μA, Vce = 0.8 V are used to have a contrastive analysis for the RF performance of the InP DHBT and the substrate transferred device. A direct comparison of the Y-parameters is shown in Fig. 4. The input characteristics (Y11) of the two devices show consistency in a wide frequency range. The performance of Y12 of the two devices is also consistent in a wide frequency range. The output performances (Y22) of the two devices show big differences at higher frequency (> 20 GHz), because of the changes of the substrate parasitics of the substrate transferred InP DHBT. The changes of the transconductance (Y21) should be caused by the change of the dc characterizations of the device transferred to RF CMOS substrate.






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Figure4.
(Color online) Comparison of the measured Y-parameters of InP DHBT and the substrate transferred InP DHBT. The emitter area for both of the devices is 0.8 × 5 μm2.




For the RF parasitics extraction, the terminal resistance Rbx, Rcx and Re are extracted from the measured Z-parameters by employing the validated method proposed in Refs. [1214]. The method proposed in Ref. [15] is further used to determine the parasitic Cad, Csub, Rsub and the collector-emitter capacitance Cce of the substrate transferred InP DHBT. The inner resistance Rbi is extracted from the total base resistance (Rb) as Rbi = (Rb ? Rbx) / X0, where Rb = Re(Z11 ? Z12) ≈ Rbx + X0Rbi, X0 is the ratio of area emitter to collector, which is defined as X0 = Ae/Ac. Once Rbx, Rcx and Re are obtained, the following gives the Y-parameters of the inner part (Yint):









$${Y_{{
m{int}}}} = {left[ {begin{array}{*{20}{c}}{{Z_{11}} - {R_{{
m{bx}}}} - {R_{
m{e}}}} & {{Z_{12}} - {R_{
m{e}}}}{{Z_{21}} - {R_{
m{e}}}} & {{Z_{22}} - {R_{{
m{cx}}}} - {R_{
m{e}}}}end{array}}
ight]^{ - 1}}.$$

(1)



To facilitate the model extraction, assume that the extrinsic parasitics Cbcx and Rbcx can be absorbed into Cbci and Rbci, respectively, and ignore the influences of Rbi to the derivation of the intrinsic Y-parameters, the intrinsic elements Rbe, Rce, Cbe, Rbc = Rbcx||Rbci and Cbc = Cbci + Cbcx then can be extracted from Yint as Rbe = [Re(Yint, 11 + Yint, 12)]?1, Rce = [Re(Yint, 22 + Yint, 12)]?1, Cbe = ω?1Im(Yint, 11 + Yint, 12), Rbc = [Re(?Yint, 12)]?1 and Cbc = ω?1Im(Yint, 22 + Yint, 21), respectively. Once Rbc and Cbc are obtained, Rbci/bcx and Cbci/bcx can be determined as Rbcx = Rbc(1 ? X0)?1, Rbci = X0?1Rbc (by assuming Rbci/Rbc = X0?1), Cbci = X0Cbc and Cbcx = (1 ? X0)Cbc, gm is obtained as gm = Re(Yint, 21), and τ is finally determined by using the cutoff frequency ft as τ = 1/(2πft). For InP DHBT, the collector-emitter capacitance Cce is determined as Cce = ω?1Im(Yint, 22 + Yint, 12). All of the extracted model parameters are listed in Table 1. The extracted results show that the terminal resistances Rbx, Rcx and Re are almost consistent, while the junction capacitances of the substrate transferred InP DHBT have an obvious increase compared with that extracted from the InP DHBT device.






Device Rbx (Ω) Rbi (Ω) Rcx (Ω) Re (Ω) Rbc (kΩ) Rbe (Ω) Rce (kΩ)
A 7.5 21.4 0.8 12.3 42 213 5.1
B 11.9 29.4 1.4 12.1 32 255 3.5





Table1.
Small signal parameters biased at Ib = 100 μA, Vc = 0.8 V. (A: substrate transferred InP DHBT; B: InP DHBT).



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Device Rbx (Ω) Rbi (Ω) Rcx (Ω) Re (Ω) Rbc (kΩ) Rbe (Ω) Rce (kΩ)
A 7.5 21.4 0.8 12.3 42 213 5.1
B 11.9 29.4 1.4 12.1 32 255 3.5








Device Cbcx (fF) Cbci (fF) Cbe (fF) Cce (fF) Gm (mS) Cad (fF) Csub (fF) Rsub (Ω)
A 16.2 4.6 117.8 20.9 201 5.7 1.06 649
B 13.0 4.1 113.2 19.4 209 ? ? ?






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Device Cbcx (fF) Cbci (fF) Cbe (fF) Cce (fF) Gm (mS) Cad (fF) Csub (fF) Rsub (Ω)
A 16.2 4.6 117.8 20.9 201 5.7 1.06 649
B 13.0 4.1 113.2 19.4 209 ? ? ?





We consider that the cut-off frequency (ft) and the maximum oscillation frequency (fmax) are important figures of merit to quantify the RF performance of a transistor. Fig. 5 shows the current gain |H21|2 and the maximum available gain (MAG) plotted against frequency at the bias of Vce = 0.8 V and Ib = 100 μA. By ?20 dB/dec roll off, the values of ft and fmax of the InP DHBT are extrapolated to be 220 and 171 GHz, respectively. The values of ft and fmax of the substrate InP DHBT are extrapolated to be 204 and 154 GHz, respectively.






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Figure5.
(Color online) Comparison of the current gain |H21|2 and the maximum available gain MAG(H21) versus frequency of InP DHBT and the substrate transferred InP DHBT. The emitter area for both of the device is 0.8 × 5 μm2.




The comparison results show that the InP DHBT has higher ft and fmax performance. Refer to the small-signal model parameters extracted at the same bias condition. The increase of the RF parasitics leads to a greater reduction in the performances of the substrate transferred InP DHBT.




4.
Conclusions




The DC and RF performances of an InP DHBT transferred to RF CMOS wafer substrate are investigated. The investigated results show that the dc current gain (β) of a substrate transferred device has no obvious change compared to the device without substrate transferred, while the cut-off frequency (ft) and the maximum oscillation frequency (fmax) are decreased obviously. The small-signal model extraction results show that the degradation of the RF performance of the device transferred to RF CMOS wafer is mainly caused by the additional introduced substrate parasitics and the increase of the capacitive parasitics (capacitance ΔCbc, ΔCbe and ΔCce caused by BCB) induced by the substrate transfer process itself.



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