1.
Introduction

There has been an increasing demand for advanced power distribution systems and pulse power systems in recent years^[1–3]. High power thyristors based on traditional silicon (Si) have been widely used as key components for these systems in the past four decades. However, the physical limits of blocking voltage, di/dt and dv/dt of these devices are approaching. It is becoming difficult to satisfy the stringent requirements of advanced power distribution systems and pulse power systems when traditional Si based thyristor technology is utilized.



Wide-bandgap silicon carbide (SiC) material is a promising alternative to overcome these limits due to its superior properties (e.g., ten times higher breakdown electric field, higher thermal conductivity and much lower intrinsic carrier concentration than silicon). Beginning in the 1990s, continual improvements in SiC single crystal wafers have result in significant progress toward the development of low defect, thick epitaxial SiC materials and high voltage SiC devices. Much progress has been made in epitaxial growth of large size wafers and low defect density. For example, high quality and low micropipe 150 mm diameter SiC epitaxial wafers have been commercially available since 2012. Various high voltage SiC power devices have been developed and reported, including 10 kV SiC MOSFETs^[4], 22 kV IGBTs^[5], 20 kV p-type gate turn-off thyristors (GTOs)^[6] and 4.5 kV SiC p-type emitter turn-off thyristors (ETOs)^[7]. Among them, high voltage SiC thyristors are the most promising switching devices for advanced power distribution systems and pulse power systems due to their high blocking voltage capability, large peak current and fast di/dt. Nevertheless, SiC GTO has the same drawbacks as silicon-based GTO, for example, current control of gate causing high power loss, non-uniform transient current distribution, slow speed of dynamic response and the requirement for turn-on di/dt snubber circuits and turn-off dv/dt snubber circuits^[8–10]. To solve these problems, the world's first 4.5 kV SiC ETO based on a SiC GTO has been demonstrated^[11]. SiC ETO is based on the mature technologies of silicon MOSFET and SiC GTO technology. With the help of the integrated MOSFETs, SiC ETO as a voltage controlled turn-off device can improve switching performance compared with the SiC GTO, such as a faster switching speed and lower power loss. The SiC GTO thyristor has been already evaluated for pulsed power applications^[12–15]. The SiC ETO has many advantages over the SiC GTO when it comes to realizing faster switching speed, lower switching energy loss and higher power density. However, reports on comparison studies of high voltage SiC GTO and ETO in pulse power applications have been rare.



This?paper?aims to?investigate?the performance of the SiC ETO in pulse power application and compare it to SiC GTO. In Section 2, the device description and switching performance of the 6.5 kV SiC ETO are shown. In Section 3, SiC GTO and SiC ETO are compared, including forward conduction at various temperatures, blocking performance and turn-off characteristics at 500 V/1 A. In Section 4, a physical-based mixed-mode is implemented in technology computer-aided design (TCAD) to investigate the turn-on process. In addition, a pulse power test bed to evaluate the performance of the SiC ETO is presented. Section 5 gives the conclusion of the paper.

2.
SiC ETO dynamic performance

The device configuration, operation principle, experimental setup and typical switching waveforms of the SiC ETO are introduced in this part.

2.1
p-GTO device structure

The SiC ETO is formed on the basis of SiC GTO devices. A unit cell structure of the 4H-SiC GTO as shown in Fig. 1. The device is based on the N⁺ substrate, so the SiC GTO is a p-type thyristor that uses an NPNP thyristor structure. The emitters of the upper p–n–p and lower n–p–n transistors form the anode and cathode, respectively. The upper base forms the gate contact.






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Figure1.
(Color online) A unit cell structure of the 4H-SiC GTO thyristor.

2.2
ETO configuration

Fig. 2 shows the basic structure of the SiC ETO. A Si p-channel MOSFET is connected with the anode and acts as an emitter switch (Q_e). Two Si N-channel MOSFETs in series with shorting of the gate and drain terminal are used as the gate switch (Q_g), which is connected in a diode configuration^[11]. The external resistor (R_g) in series with the Q_g is used to achieve a gate drive current during the turn-on process. Another external resistor (R_e) in series with the Q_e is used to achieve a fast switching speed of the Q_e.






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Figure2.
Schematic of 6.5 kV SiC ETO basic structures.




Initially, the SiC ETO is in the forward blocking state. After a negative gate voltage is applied to the gate of the SiC ETO and the emitter switch Q_e, gate current is injected to the gate of the SiC GTO and negative gate voltage is applied to Q_e to turn on the SiC ETO. According to Kirchhoff's Voltage Law, the relationship among voltages across the Q_e, gate voltage of the Q_g, and the voltage drop of junction J₁ can be derived as Eq. (1):

${V_{{Q_{ m{g}}}}} = {V_{{Q_{ m{e}}}}} + {V_{{J_1}}},$

(1)

where $V_{Q_{
m g}}$ is the gate voltage of the Q_g, $ V_{Q_{
m e}}$ is the drain-to-source voltage of the Q_e and V_J1 is the forward voltage drop across the junction J₁. The threshold voltage of the gate switch Q_g is 3.5 V; during the on state, the forward voltage V_J1 across the junction J₁ is about 3 V. The sum of the conduction voltage V_Qe of the emitter switch Q_e and the forward voltage V_J1 across the junction J₁ must be less than the gate voltage of Q_g to prevent gate switch Q_g functioning. Therefore two Si N-channel MOSFETs in series with the Q_g are used as the gate switch with a turn-on threshold voltage of 7 V. After a positive voltage is applied to the gate of SiC GTO and the emitter switch Q_e, Q_e cuts off the anode current path and the anode current is commutated to the gate path. In this way, a unity-gain turn-off is realized. When a high voltage is applied to the SiC ETO, Q_e and SiC GTO withstand the voltage. The gate voltage of Q_e is clamped to be less than the difference value between $V_{Q_{
m g}}$ and V_J1. Therefore the SiC GTO withstands almost all the blocking voltage of the SiC ETO during the high voltage blocking state.

2.3
Experimental setup for dynamic switching tests

In order to investigate the dynamic switching performance of the 6.5 kV SiC ETO, a double pulse test board with clamped inductive load is tested as shown in Fig. 3, which consists of a gate drive circuit and a main circuit. The main circuit and the gate drive were integrated in a PCB board to reduce stray inductance. The SiC ETO includes a 6.5 kV 40 A SiC GTO (GA040TH65), two 100 V 60 A N-channel MOSFETs (IXTT60N10) are in series with the gate of the SiC GTO as the gate switch Q_g and a 100 V 50 A P-channel MOSFET (IXTH50P10) is in series with the anode as the emitter switch Q_e. The threshold voltage of the gate switch Q_g and the emitter switch Q_e are 7 and 3.5 V, respectively. The SiC ETO is a negative voltage device in this solution, where the gate voltage for the SiC ETO is ?15 V for turn-on and 0 V for turn-off. An external resistor R_g of 50 Ω is used to achieve a gate drive current of about 240 mA and another external resistor R_e of 2 Ω is used to obtain a fast switching speed of Q_e. The SiC ETO is tested up to 3 kV. Five series 1.2 kV SiC Schottky diodes are selected as the freewheeling diodes and are in parallel with the 5 mH inductive load. The SiC ETO gate drive circuit is shown in Fig. 4, which includes an isolated power supply, high speed optocoupler and driver unit. The optocoupler FOD3182 is used to isolate the control signal with an isolation voltage up to 5 kV. The isolated DC/DC converter NMS1215C with an asymmetric output of ?15 V/0 V is used for providing gate voltage. It can provide a 6 kV isolation voltage. The gate drive integrated circuit MIC4451 is used to provide a peak output current of 12 A. Its totem-pole driver with the PMOS and NMOS transistors is introduced to guarantee driving capability.






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Figure3.
(Color online) Prototype of the 6.5 kV SiC ETO test board.






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Figure4.
Schematic of SiC ETO gate drive circuit.

2.4
Switching performance

The switching characteristics of the SiC ETO were tested with a clamped inductive load circuit. Fig. 5 shows the SiC ETO switching waveforms at ?3 kV. In the figure, Ch1 (navy line) is the gate voltage V_G, Ch2 (cyan line) is the cathode voltage V_KA of the SiC ETO, Ch3 (magenta line) is the gate current I_G and Ch4 (green line) is the anode current I_AK of the SiC ETO. Initially, the SiC ETO is in the forward blocking state. When a high DC bus voltage is applied to the SiC ETO, both the SiC GTO and the emitter switch Q_e support the voltage bias V_KA. After applying a turn-on optical pulse, a gate current of 240 mA is applied to the gate of the SiC GTO and ?15 V is applied to the Q_e to turn on the SiC ETO. After a turn-on delay time, the cathode voltage V_KA falls from ?3 kV to conduction voltage in 0.3 μs with a 10 kV/μs dv/dt. Due to charging of the parasitic capacitance of the circuit, a transient current spike is observed in the anode current waveforms. The device starts conducting and the anode current I_AK increases linearly due to the inductive load. The turn-on speed is very fast and the process only lasted for 1.4 μs. The turn-off process starts when the optical pulse is removed. The gate voltage changes from ?15 to 0 V. Thereafter, the emitter switch Q_e is turned off. When the voltage of the Q_g rises to the threshold voltage, the Q_g will be turned on immediately. The anode current completely communicates to the gate path before the cathode voltage starts to rise. Finally, the cathode current decreases to zero very quickly. The SiC ETO achieves unity-gain turn-off and the device behaves like an open base n-p-n transistor. In the turn-off waveforms shown in Fig. 5, the total turn-off time is about 4.06 μs, and the turn-off energy loss is 9.4 mJ. The maximum switching frequency for the thyristor structure is limited by the turn-off energy. SiC ETO's extremely low turn-off energy loss allows it to operate at a high operating frequency.






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Figure5.
(Color online) SiC ETO switching waveforms at 3 kV.

3.
Comparison of SiC GTO and SiC ETO

In this section, the forward conduction characteristics, blocking characteristics and turn-off performance of SiC GTO and SiC ETO were measured and compared.

3.1
Forward conduction characteristics

The forward conduction characteristics of the SiC ETO are determined by the emitter switch Q_e and the SiC GTO. The forward voltage drop of the SiC ETO can be expressed as Eq. (2):

${V_{{ m{ETO}}}} = {V_{{ m{GTO}}}} + {V_{{Q_{ m{e}}}}},$

(2)

where V_ETO is the forward voltage drop of the SiC ETO, V_GTO is the forward voltage drop of the SiC GTO and $V_{Q_{
m e}}$ is the conduction voltage of the Q_e. The conduction characteristics of the p-channel MOSFET (Q_e) are shown in Fig. 6. When the ETO is turned on, the driving voltage applied to Q_g is ?15 V. It can be seen from the figure that the voltage drop of the conduction is small, and the influence of the increase of the conduction voltage drop of the whole SiC ETO is relatively small. The forward conduction characteristics of the SiC GTO and SiC ETO were measured at room temperature, 75 and 125 °C respectively. As shown in Fig. 7, the GTO displays a forward voltage drop of 4.4 V at a current of 20 A and a gate drive current of 240 mA at room temperature. Under the same conditions, the GTO shows a forward voltage drop of 4.35 V at 75 °C and 4.1 V at 125 °C. It is obvious that the SiC GTO has a negative temperature coefficient. This feature is unsuitable for parallel operation of the device in the case of a large current at high temperature. Under the condition that the current is 20 A and the gate current is 240 mA, the conduction voltage of the SiC ETO is 5.7 V at room temperature, 5.8 V at 75 °C and 5.9 V at 125 °C. The SiC ETO shows a positive temperature coefficient, which is caused by compensation in the temperature coefficient from the series-connected P-channel MOSFET. It indicates that the ETO obtains excellent parallel capability compared to the SiC GTO. Multiple SiC ETO devices can be used safely in parallel to realize a high conduction current.






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Figure6.
(Color online) The conduction characteristics of the p-channel MOSFET.






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Figure7.
(Color online) Forward conduction characteristics of the SiC GTO and SiC ETO at various temperatures.

3.2
Blocking performance

Fig. 8 illustrates the blocking characteristic of the SiC GTO at room temperature. As shown in Fig. 8, the SiC GTO is able to block 6.5 kV with a leakage current of 12.7 μA. Since the P-MOSFET with a blocking voltage of 100 V is connected in series at the anode, the blocking voltage of the SiC ETO is the sum of the emitter switch Q_e and the SiC GTO.






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Figure8.
(Color online) Blocking characteristics of the 6.5 kV SiC GTO at room temperatures.

3.3
Turn-off performance

A comparison of the turn-off waveforms of the SiC GTO and SiC ETO under the same gate drive current and DC bus voltage test condition in the pulse discharge experiment is shown in Fig. 9, in which the DC bus voltage is 500 V and current is 1 A.






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Figure9.
(Color online) Turn-off waveforms at 500 V/1 A (a) SiC GTO and (b) SiC ETO.




The turn-off of the SiC GTO is accomplished by using the large reverse gate current to remove the stored charge from the N-base. It is normally turned off with a turn-off gain (defined as I_AK/I_G) of higher than unity. The gate driver usually has a high power consumption. However, the SiC ETO has a quite different turn-off mode. Because the anode current completely communicates to the gate and the device has sufficient gate current to remove the minority carriers in the N-base, the SiC ETO can realize a unity-gain turn-off. According to experimental results, the turn-off losses of SiC GTO and SiC ETO are 0.42 and 0.31 mJ, respectively. Compared to the turn-off speed of the SiC GTO, the SiC ETO can achieve 35% shorter turn-off time and takes less time to reach the off state. Compared with the turn-off energy loss of the SiC GTO, the SiC ETO can achieve a 25% smaller turn-off energy loss. As a voltage-controlled turn-off device, SiC ETO achieves improved turn-off performances compared to the SiC GTO, such as a faster switching speed and lower switching loss.

4.
Pulsed power application

Due to its excellent conductivity modulation capability, the SiC GTO is an ideal device for pulsed power applications that require high turn-on di/dt. Furthermore, the SiC GTO offers great advantages such as high current conducting capability, high blocking voltage and low leakage current at high temperature. Furthermore, SiC ETO is superior to SiC GTO, having a faster switching speed, lower switching energy and higher power density.



In order to investigate the advantages of SiC ETO in pulse power applications, a physical-based mixed-mode is used to study the turn-on process. The physical models used in the simulations include the mobility model, recombination model, bandgap narrowing model, etc. The?fundamental?parameters used in the simulations come?from?some?publications^[16–18]. Some key parameters are presented in Table 1. The simulation is conducted in a circuit mixed-mode setup as shown in Fig. 10. The voltage dropping speed reflects the speed of the turn-on process, and higher dv/dt means higher di/dt capability of the device. The dv/dt is related to the external circuit, including DC bus voltage and gate drive current. Various values of gate current I_g and DC bus voltage are simulated to show the effects.

Parameter	SiC GTO
Base doping	7 × 1016 cm?3
Emitter doping	2 × 1019 cm?3
Drift doping	2.5 × 1014 cm?3
Anode width	10 μm
Gate width	5 μm
Base thickness	2.5 μm
Anode thickness	2.5 μm
Drift thickness	75 μm
Distance between A and G	5 μm
Lifetime τn = 3τp	0.6 μm

Table1.
Key parameters used in the simulation.



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Parameter	SiC GTO
Base doping	7 × 1016 cm?3
Emitter doping	2 × 1019 cm?3
Drift doping	2.5 × 1014 cm?3
Anode width	10 μm
Gate width	5 μm
Base thickness	2.5 μm
Anode thickness	2.5 μm
Drift thickness	75 μm
Distance between A and G	5 μm
Lifetime τn = 3τp	0.6 μm

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Figure10.
(Color online) Mixed-mode circuit simulation setup.




The influences of the DC bus voltage on the dv/dt and gate current I_g are remarkable, as shown in Fig. 11. As shown in Fig. 11(a), the dv/dt is 3.2 kV/μs for a DC bus voltage of ?1 kV, but it significantly increases to 16 kV/μs for a voltage of ?4.5 kV. The simulated results show that di/dt can be controlled by DC bus voltage. By changing the resistance R_g, it can vary the gate drive current. The simulated waveforms are shown in Fig. 11(b), in which the magnitude of the gate drive current has no influence on dv/dt. The gate current affects the turn-on time of the SiC ETO. For example, the turn-on time is reduced by 1.2 μs fromI_G = 0.24 A to I_G = 3 A. It indicates that the turn-on time can be reduced by increasing the gate current. This means that higher gate current can achieve a higher turn-on di/dt.






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Figure11.
(Color online) Simulated results with (a) different dv/dt and (b) different gate current.




The pulse power test bed is built to demonstrate the superior performance of the SiC ETO as shown in Fig. 12. It includes a negative high-voltage DC power supply, a capacitor bank (C_bank), a SiC ETO, a charging resistor (R_C), a discharging resistor(R_discharge), a low inductance current resistor (R_S ) and a resistor load (R_L). The negative voltage supply allows the anode to be grounded and provides a reference ground for the gate driver. It can provide a maximum voltage of ?40 kV and a maximum current of 15 mA. The capacitor bank (C_bank) represents an array of six film capacitors at 2.5 kV and the capacity is 200 μF. In order to achieve high di/dt, the stray inductance of the test circuit must be minimized. Hence, a laminated bus-bar structure was designed to connect the capacitors^[19–21]. The charging resistor (R_C) was used to charge up the 133 μF capacitor bank (C_bank) to the DC bus voltage. The SiC ETO was used as a switch to discharge the capacitor bank into a 500 Ω load resistor (R_L). A precise current shunt (R_S) from T&M research (R = 10 mΩ, BW = 400 MHz,) was used to monitor the anode current.






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Figure12.
(Color online) (a) Prototype and (b) circuit diagram of pulse power test bed.




Fig. 13 shows the result of a single pulse discharge test, the switching voltage and current waveforms at a peak anode current I_AK of 3 A and cathode voltage of ?1.5 kV. The discharging time is determined by the value of the resistor load and capacitor bank. During turning-on, the anode current rises to the peak current, taking only 2 μs. This shows that SiC ETO can discharge the energy stored in the capacitor for about 2 μs and achieve a high di/dt. During turning-off, the turn-off time is also very short. Therefore the pulse power system can perform multiple discharging experiments.






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Figure13.
(Color online) SiC ETO pulse discharge waveforms at 1.5 kV/3 A.

5.
Conclusion

In this paper, a 6.5 kV SiC ETO was designed and fabricated with a PCB integrated gate driver. The switching characteristics test shows that the SiC ETO can operate at high blocking voltage, high switching speed and high temperature. In addition, the SiC GTO and SiC ETO are compared, including the forward conduction at various temperatures, blocking characteristics and turn-off performances in the case of 500 V/1 A. The results indicate that the SiC ETO shows a positive temperature coefficient, good stability and high current switching capability for pulse power application. The turn-off characteristics demonstrate that the SiC ETO can achieve a 35% shorter turn-off time and 25% less turn-off energy than the SiC GTO.



A physics-based mixed-mode is presented. The simulation result shows that the SiC ETO can achieve high di/dt at high switching speed by changing gate current and DC bus voltage in pulse power switching. Moreover, a pulse power test bed is built to evaluate the performance of SiC ETO in pulse power application. It illustrates how SiC ETO can discharge energy stored in the capacitor in about 2 μs and achieve a high di/dt. In summary, the SiC ETO is advantageous in turn-on di/dt, switching speed and switching energy loss compared to the SiC GTO, which means that it is promising for high-voltage pulse power applications.