个人简历
2009年毕业于华中科技大学光电信息工程系获学士学位，2014年获得法国南巴黎大学物理学博士学位。2014年至2015年在法国国家科学院进行博士后研究。2015年3月至今任北航卓越百人副教授。研究领域包括自旋电子学、超低功耗储存器、新型计算逻辑系统。主要研究方向涉及自旋电子器件建模、超低功耗自旋存储逻辑电路设计、赛道存储器、全自旋逻辑器件等。迄今出版学术书籍3部，在Advanced Electronic Materials、Physical Review Applied、Electron Device Letters等期刊上发表论文80余篇，其中SCI检索论文50余篇，一篇IEEE trans. Electron Devices文章被评为“ESI高引用论文”。获得4次国际会议最佳论文奖。多次被DATE、ISCAS等国际知名会议邀请报告。担任IEEE trans. Electron Devices、IEEE trans. Nanotechnology、IEEE trans. Multi-Scale Computing Systems等多部国际期刊审稿人。获得2013年国家优秀自费留学生奖学金。2017年入选中国科协“青年人才托举工程”。目前担任国际期刊IEEE Access副主编。
教育经历
[1] 2011.10-2014.7法国南巴黎大学 博士学位 | 博士研究生毕业
[2] 2009.9-2011.8
法国南巴黎大学 Master's Degree | 硕士研究生毕业
[3] 2005.9-2009.8
华中科技大学 Bachelor's Degree | 大学本科毕业
研究领域
当前位置: 中文主页 >> 研究领域自旋电子学、超低功耗储存器、新型计算逻辑系统
科研项目
当前位置: 中文主页 >> 科研项目[1] 北航青年人才拔尖计划
[2] 北航卓越百人计划
[3] 全自旋逻辑器件中垂直磁各向异性和非对称性的研究-2018/12/31
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论文
当前位置: 中文主页 >> 论文[1] Yue Zhang, Erya Deng, Jacques-Olvier Klein, Damien Querlioz, Dafiné Ravelosona, Claude Chappert, Mathieu Moreau, Jean-Michel Portal, Marc Bocquet, H. Aziza, Damien Deleruyelle, Christrophe Muller and Weisheng Zhao, “Synchronous Full-Adder Based on Complementary Resistive Switching Memory Cells”, IEEE International New Circuits and Systems Conference (NEWCAS), pp. 1-4, June, 2013.
[2] Zhizhong Zhang, Yue Zhang*, Lei Yue, Li Su, Yichuan Shi, Youguang Zhang, Weisheng Zhao, “Ultra-Low Power All Spin Logic Device Acceleration based on Voltage Controlled Magnetic Anisotropy”, IEEE/ACM International Symposium on Nanoscale Architectures (Nanoarch), pp. 141-142, July, 2016.
[3] Guanda Wang, Yue Zhang*, Zhizhong Zhang, Jiang Nan, Zhenyi Zheng, YU Wang, Lang Zeng, Youguang Zhang, Weisheng Zhao, “Compact modeling of high spin transfer torque efficiency double-barrier magnetic tunnel junction”, IEEE/ACM Nanoarch, 49-54, 2017.
[4] Wang Kang, Weisheng Zhao, Jacques-Olivier Klein, Zhaohao Wang, Yue Zhang, Youguang Zhang, Dafiné Ravelosona and Claude Chappert, “An Overview of Spin-based Integrated Circuits”, IEEE Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 676-683, Jan, 2014. (invited paper)
[5] Weisheng Zhao, Jacques-Olivier Klein, Zhaohao Wang, Yue Zhang, Nesrine Ben Romdhane, Damien Querlioz, Dafiné Ravelosona and Claude Chappert, “Spin-electronics Based Logic Fabrics”, IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SOC), pp. 174-179, Oct, 2013. (invited paper)
[6] Weisheng Zhao, Nesrine Ben Romdhane, Yue Zhang, Jacques-Olviler Klein and Dafiné Ravelosona, “Racetrack Memory Based Reconfigurable Computing”, IEEE Faible Tension Faible Consommation, pp.1-4, June, 2013. (invited paper)
[7] Yue Zhang, Chao Zhang, Jacques-Olivier Klein, Dafine Ravelosona, Guangyu Sun and Weisheng Zhao, “Perspectives of Racetrack memory based on current-induced domain wall motion: from device to system”, ISCAS, pp. 381-384, 2015. (invited paper)
[8] Yue Zhang, Weisheng Zhao, Jacques-Olivier Klein, Wang Kang, Damien Querlioz, Youguang Zhang, Dafiné Ravelosona and Claude Chappert, “Spintronics for low power computing”, Design, Automation & Test in Europe (DATE), pp.1-6, Mars, 2014. (invited paper)
[9] Jean-Michel Portal, Marc Bocquet, Mathieu Moreau, Hassen Aziza, Damien Deleruyelle, Yue Zhang, Wang Kang, Jacques-Olivier Klein, Youguang Zhang, Claude Chappert and Weisheng Zhao, “An Overview of Non-volatile Flip-Flops Based on Emerging Memory Technologies", Journal of Electronics Science and technology, vol.12, no.2, 2014, pp.173-181. (invited review)
[10] Shouzhong Peng, Wang Kang, Mengxing Wang, Kaihua Cao, Xiaoxuan Zhao, Lezhi Wang, Yue Zhang, Youguang Zhang, Yan Zhou, Kang L Wang, Weisheng Zhao, “Interfacial Perpendicular Magnetic Anisotropy of 1x nm Tunnel Junctions for Large-Capacity STT-MRAMs”, IEEE Magnetics Letters, vol. 8, **, 2017.
[11] Deming Zhang, Lang Zeng, Tianqi Gao, Fanghui Gong, Xiaowan Qin, Wang Kang, Yue Zhang, Youguang ZHANG, Jacques Olivier Klein, ZHAO Weisheng, “Reliability-enhanced Separated Pre-charge Sensing Amplifier for Hybrid CMOS/MTJ Logic Circuits”, IEEE Transactions on Magnetics, vol. 53, 9, **, 2017
[12] Zhaohao Wang, Weisheng Zhao, Wang Kang, Annes Bouchenak-Khelladi, Yue Zhang, Jacques-Olivier Klein, Dafine Ravelosona, Claude Chappert, “A physics-based compact model of ferroelectric tunnel junction for memory and logic design”, Journal of Physics D: Applied Physics, vol.47, 045001, 2014.
[13] Zhaohao Wang, Weisheng Zhao, Wang Kang, Annes Bouchenak-Khelladi, Yue Zhang, Jacques-Olivier Klein, Dafine Ravelosona and Claude Chappert, “Write operation study of Co/BTO/LSMO ferroelectric tunnel junction”, Journal of Applied Physics, vol.114, 044108, 2013.
[14] Weisheng Zhao, J.M Portal, W. Kang, M. Moreau, Y. Zhang, H. Aziza, J-O Klein, Zhaohao Wang, D. Querlioz, D. Deleruyelle, M. Bocquet, D. Ravelosona, C. Muller and C. Chappert, “Design and analysis of Crossbar Architecture based on Complementary Resistive Switching non-volatile Memory Cells”, Journal of Parallel and Distributed Computing, vol. 74, pp. 2484-2496, 2014.
[15] You Wang, Hao Cai, Lirida Naviner, Xiaoxuan Zhao, Yue Zhang, Erya Deng, Jacques-Olivier Klein, Weisheng Zhao, “A process-variation-resilient methodology of circuit design by using asymmetrical forward body bias in 28nm FDSOI”, Microelectronics Reliability, vol.64, pp.26-30, 2016.
[16] Xiaoyang Lin, Li Su, Zhizhong Si, Youguang Zhang, Arnaud Bournel, Yue Zhang, Jacques-Olivier Klein, Albert Fert, Weisheng Zhao, “Gate-driven pure spin current in graphene”, Physical Review Applied, vol. 8, 3, 034006, 2017.
[17] Jiaqi Zhou, Arnaud Bournel, Yin Wang, Xiaoyang Lin, Yue Zhang, Weisheng Zhao, “Silicene spintronics: Fe (111)/silicene system for efficient spin injection”, Appl. Phys. Lett., vol. 111, 18, 182408, 2017.
[18] Marc Bocquet, Hassen Aziza, Weisheng Zhao, Yue Zhang, Santhosh Onkaraiah, Christophe Muller, Marina Reyboz, Damien Deleruyelle, Fabien Clermidy and Jean-Michel Portal, “Compact modeling solutions for OxRAM memories”, Journal of Low Power Electronics and Applications, vol.4, pp.1-14, 2014.
[19] Zhaohao Wang, Weisheng Zhao, Erya Deng, Yue Zhang, Jacques-Olivier Klein, “Magnetic non-volatile flip-flop with spin Hall assistance”, Physica Status Solidi RRL, vol. 9, pp. 375-378, 2015.
[20] Wang Kang, Weisheng Zhao, Zhaohao Wang, Yue Zhang, Jacques-Olivier Klein, Youguang Zhang, Claude Chappert, Dafine Ravelosona, “A low-cost built-in error correction circuit design for STT-MRAM reliability improvement”, Microelectronics Reliability, vol.53, pp.1224-1229, 2013.
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荣誉及奖励
当前位置: 中文主页 >> 荣誉及奖励[1]IEEE Transactions on Circuits and Systems Guillemin-Cauer 最佳论文奖
[2]国家优秀自费生奖学金
[3]中国科协“青年人才托举工程”
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