summary
现任浙江大学超大规模集成电路设计研究所副教授、副所长。2000年以来在浙江大学担任过工程师、副研究员等职。1996年至2000年在硅谷任Symmetry Design Systems公司设计工程师，1992年至1996年任西湖电子集团设计工程师。他目前的研究领域是纳米尺度集成电路设计，成品率增强技术和集成电路物理设计方法，他在这些领域已发表20余篇论文，主持完成多个国家级和企业科研项目，包括完成自主OPC系统以及多种纳米节点成品率测试芯片的成功量产运行。他分别于1990年和1992年获得清华大学电子工程学士、硕士学位，于2005年获得浙江大学电子工程博士学位。
Mr. Zheng Shi is an associate professor and deputy director of the Institute of VLSI Design of Zhejiang University (ZJU), Hangzhou, China. He has been serving in ZJU since 2000 beginning from positions of research engineer and associate researcher. Before joining ZJU, he worked as a design engineer of Symmetry Design Systems in Palo Alto, CA from 1996 to 2000, and an electronic engineer of West Lake Group in Hangzhou from 1992 to 1996.
His current research interests include design of nanometer-scale Integrated Circuit (IC), yield enhancement technology and physical design methodology of IC. He has published more than 20 papers in these areas, and as the team leader accomplished a number of leading R&D projects including the developments of a proprietary Optical Proximity Correction (OPC) system as well as various yield testing chips specifically designed for sub-100nm technology nodes, all with successful adoptions in mass production lines.
He received his B.S.E.E. degree and M.S.E.E. degree from Tsinghua University, Beijing in 1990 and 1992 respectively, and the Ph.D. degree from Zhejiang University in 2005.
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集成电路设计自动化、集成电路可制造性设计(Design Automation and Design-for-Manufacturability of IC)
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1
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2008-01-04 10:43:23
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selfintroduction
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\r现任浙江大学超大规模集成电路设计研究所副教授、副所长。2000年以来在浙江大学担任过工程师、副研究员等职。1996年至2000年在硅谷任Symmetry Design Systems公司设计工程师，1992年至1996年任西湖电子集团设计工程师。他目前的研究领域是纳米尺度集成电路可制造性设计(DFM)，成品率增强技术和集成电路物理设计，他在这些领域已发表20余篇论文，主持完成多个国家级科研项目，包括完成自主OPC系统以及多种90-20纳米节点成品率测试芯片的成功量产运行。他分别于1990年和1992年获得清华大学电子工程学士、硕士学位，于2005年获得浙江大学电子工程博士学位。
\rMr. Zheng Shi is an associate professor and deputy director of the Institute of VLSI Design of Zhejiang University (ZJU), Hangzhou, China. He has been serving in ZJU since 2000 beginning from positions of research engineer and associate researcher. Before joining ZJU, he worked as a design engineer of Symmetry Design Systems in Palo Alto, CA from 1996 to 2000, and an electronic engineer of West Lake Group in Hangzhou from 1992 to 1996.
\rHis current research interests include Design-for-manufacturability (DFM) of nanometer-scale Integrated Circuit (IC), yield enhancement technology and physical design methodology of IC. He has published more than 20 papers in these areas, and as the team leader accomplished a number of state-funded R&D projects including the developments of a proprietary Optical Proximity Correction (OPC) system as well as various yield testing chips specifically designed for technology nodes from 90nm down to 20nm, all with successful adoptions in mass production lines.
\rHe received his B.S.E.E. degree and M.S.E.E. degree from Tsinghua University, Beijing in 1990 and 1992 respectively, and the Ph.D. degree from Zhejiang University in 2005.
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N\/A
shiz at vlsi.zju.edu.cn
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浙江大学玉泉校区老生仪楼
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2021-01-24 20:06:46
content
现任浙江大学超大规模集成电路设计研究所副教授、副所长。2000年以来在浙江大学担任过工程师、副研究员等职。1996年至2000年在硅谷任Symmetry Design Systems公司设计工程师，1992年至1996年任西湖电子集团设计工程师。他目前的研究领域是纳米尺度集成电路设计，成品率增强技术和集成电路物理设计方法，他在这些领域已发表20余篇论文，主持完成多个国家级和企业科研项目，包括完成自主OPC系统以及多种纳米节点成品率测试芯片的成功量产运行。他分别于1990年和1992年获得清华大学电子工程学士、硕士学位，于2005年获得浙江大学电子工程博士学位。
Mr. Zheng Shi is an associate professor and deputy director of the Institute of VLSI Design of Zhejiang University (ZJU), Hangzhou, China. He has been serving in ZJU since 2000 beginning from positions of research engineer and associate researcher. Before joining ZJU, he worked as a design engineer of Symmetry Design Systems in Palo Alto, CA from 1996 to 2000, and an electronic engineer of West Lake Group in Hangzhou from 1992 to 1996.
His current research interests include design of nanometer-scale Integrated Circuit (IC), yield enhancement technology and physical design methodology of IC. He has published more than 20 papers in these areas, and as the team leader accomplished a number of leading R&D projects including the developments of a proprietary Optical Proximity Correction (OPC) system as well as various yield testing chips specifically designed for sub-100nm technology nodes, all with successful adoptions in mass production lines.
He received his B.S.E.E. degree and M.S.E.E. degree from Tsinghua University, Beijing in 1990 and 1992 respectively, and the Ph.D. degree from Zhejiang University in 2005.
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个人简介
