2013年我院在“电子科学与技术”、“计算机科学与技术”两个学科招收博士生，招生名额4人，招生导师如下（按姓氏排序）：
 
1）电子科学与技术
招生导师：李小勇、连勇、马骏、毛志刚、施国勇、周健军
 
2）计算机科学与技术
招生导师：付宇卓、蒋江、祝永新
 
注：我院招生导师以学院网站公布为准，报名注意事项请与导师联系；考试科目等信息请查询学校研究生院网站。


导师介绍

1、李小勇
研究方向 射频模拟集成电路设计 
联系方式 联系电话：34204546-1063
Email：lixiaoyong@sjtu.edu.cn
个人简介
李小勇博士，中组部“青年****”入选者，上海交通大学特别研究员。1997年获北京大学微电子学士学位，2000年获北京大学微电子硕士学位，2004年获美国华盛顿大学电子工程博士学位。2004年8月加入美国高通公司，历任资深工程师，主管工程师，资深主管工程师，项目经理。2012年5月加入上海交通大学微电子学院。
李小勇博士2009年获美国高通公司 Qualcomm Qualstar Award，2005年获美国高通公司Qualcomm QCT Super Qualstar Award，2005年获美国SRC组织颁发的SRC Invention Recognition Award，2003年获美国SRC组织举办的国际SiGe设计大赛第一名，2002年获美国ADI公司颁发的Analog Devices Outstanding Student Designer Award。
李小勇博士长期以来从事射频模拟集成电路设计和无线通讯系统芯片设计的研究，在国际知名期刊和会议上发表论文近20篇，包括JSSC，ISSCC，TCAS-I, TCAS-II, RFIC 等。李小勇博士现拥有美国授权专利6项，另有两项美国专利正在申请中。

Dr. Xiaoyong Li received the B.S. and M.S. degrees from Peking University, Beijing, China, in 1997 and 2000, respectively, all in Computer Science and Technology. He received the Ph.D. degree in electrical engineering from the University of Washington, Seattle, WA, in 2004. In August 2004 he joined Qualcomm Incorporated, San Diego, CA, engaging in the design and development of CMOS integrated circuits for cellular and wireless connectivity applications. In May 2012 Dr. Li became a Distinguished Research Fellow at Shanghai Jiao Tong University. His research interests include the design of RF, analog and mixed signal integrated circuits. 

Dr. Li was the recipient of the 2002 Analog Devices Outstanding Student Designer Award and the corecipient of the first-place winners of Phase I of the 2003 SRC SiGe BiCMOS Design Contest. In 2012 Dr. Li received the Thousand Young Talents Award from the Chinese Thousand Talents Program.　　Dr. Li holds 6 US patents.

代表性论文：
1、X. Li, S. Shekhar and D.J. Allstot, “Gm-Boosted Common-Gate LNA and Differential Colpitts VCO/QVCO in 0.18-um CMOS,” IEEE Journal of Solid-State Circuits (JSSC), Vol.40, pp. 2609-2619, December 2005. (Top 100 documents accessed by IEEEXplore in December 2005)
2、X. Li, S. Shekhar and D.J. Allstot, “Low-Power Gm-Boosted LNA and VCO Circuits in 0.18-um CMOS,” Proc. IEEE International Solid-State Circuits Conference (ISSCC), pp. 534-535, February 2005.
3、W. Zhuo, X. Li, S. Shekhar, S.H.K. Embabi, J. Pineda de Gyvez, D.J. Allstot and E. Sanchez-Sinencio, “A Capacitor Cross-Coupled Common-Gate Low-Noise Amplifier,” IEEE Transaction on Circuits and Systems-II (TCAS-II), vol. 52, pp. 875-879, December 2005. 4、D.J. Allstot, X. Li and S. Shekhar, “Design Considerations for CMOS Low-Noise Amplifiers,” IEEE Radio Frequency Integrated Circuits Symposium (RFIC), pp. 97-100, June 2004. (Invited)
5、S. Shekhar, X. Li and D.J. Allstot, “A CMOS 3.1-10.6GHz UWB LNA Employing Stagger-Compensated Series Peaking,” IEEE Radio Frequency Integrated Circuits Symposium (RFIC), pp. 63-66, June 2006.
6、T. Kim, X. Li, and D.J. Allstot, “Compact Model Generation for On-Chip Transmission Lines,” IEEE Transaction on Circuits and Systems-I (TCAS-I), Vol.51, pp. 459-470, March 2004.
7、D.J. Allstot, S. Aniruddhan, G. Banerjee, M. Chu, X. Li, J. Paramesh, S. Shekhar, and K. Soumyanath, “Circuit Techniques for CMOS Multiple-Antenna Transceivers,” IEEE Radio Frequency Integrated Circuits Symposium (RFIC), pp. 225-228, June 2005. (Invited)


2、连勇
研究方向 集成电路设计、数字信号处理 
联系方式 Email：eleliany@gmail.com

个人简介
连勇博士，中组部“****”专家，上海交通大学讲席教授。连勇博士1984年获得上海交通大学工商与管理学院学士学位,1994年获新加坡国立大学博士学位。1996年加入新加坡国立大学，曾任新加坡国立大学电子及计算机工程系主管科研副主任，教务长讲席教授、集成电路学科负责人、大学评议会代表、大学教员晋升与终身教授评委会委员。连勇博士也是新加坡工程院院士、美国电子工程院院士（IEEE Fellow）。
连勇博士主要从事集成电路设计及数字信号处理方面的研究，在新加坡国立大学工作期间，领导团队发明了世界第一款毫微瓦(450nW)可编程生物医学传感器接口芯片，发明了世界第一款32通道毫微瓦脑电图芯片，首创每通道1.13微瓦多通道数字域切换神经信号记录芯片。已出版学术专著1部、专利5项，在JSSC、ISSCC、IEEE Trans. on CAS、IEEE Trans. on Signal Processing , IEEE Trans. on Multimedia等国际著名期刊、会议上发表学术论文170余篇，并获得十多次论文大奖。连勇博士于2010年在新加坡创办ClearBridge Vital Signs Pte Ltd，主要从事可穿戴无线生物医学传感器的研制，连勇博士研制的心电贴（ECG　Plaster）荣获2011年新加坡工程师协会最高工程成就奖。
连勇博士在许多国际重要学术团体中任职。他目前就任国际著名期刊IEEE Transactions on Circuits and Systems II 主编，IEEE Transactions on Biomedical Circuits and Systems督导委员会主席。他曾担任IEEE医疗技术创新金奖（IEEE Medal for Innovations in Healthcare Technology）评委，IEEE Fellow评审委员会委员，IEEE电路与系统学会亚太区副总裁，生物医疗电路与系统技术委员会主席，数字信号处理技术委员会主席等职务，并担任多个国际学术会议（如ISCAS, BioCAS、ICGCS、PrimeAsia）的组织领导工作。


 
3、马骏
研究方向  集成电路数字通信系统，集成电路数字媒体处理
联系方式  联系电话：34204546-1060
Email：majun@sjtu.edu.cn
 
个人简介
马骏博士1993年获西安交通大学信息科学与控制工程学士学位, 1995年获美国休士敦大学应用数学硕士学位, 1999年获美国明尼苏达大学电机工程博士学位.
在过去九年中,马骏博士作为高级技术人员,系统工程部经理,和公司创建团队成员先后任职美国摩托罗拉研发中心,美国博康(Broadcom),上海钰硕科技,和美国芯美科技(Newport Media)公司.作为主要系统架构师,他参与并主持设计成功了四个大型宽带通信物理层基带芯片: 电缆调制解调(DOCSIS Cable Modem Headend Receiver)、千兆以太网 (Gigabit Ethernet PHY)、欧洲数字手机电视 (DVB-T/H)、 日本数字手机电视(ISDB-T/Tsb)芯片. ISDB-T/Tsb 数字手机电视芯片是第一颗面向日本数字移动多媒体广播电视系统的CMOS 集射频, 混频, 数字基带解调于一体的SoC芯片.
马骏博士还曾短期就职于荷兰代尔夫特(Delft)大学和美国朗讯贝尔实验室.
2008年4月, 马骏博士成为上海交通大学微电子学院教授.
马骏博士在IEEE一流学术期刊和会议上发表了30余篇论文, 在无线宽带通信领域申请了22项美国专利.
 
 
4、毛志刚
研究方向  集成电路设计,先进体系结构 
联系方式  联系电话：34205701
Email：maozhigang@sjtu.edu.cn
 
个人简介
教授，博士生导师，上海交通大学微电子学院院长，国家核高基重大专项总体专家组专家。
清华大学半导体器件与物理学士学位（1986），法国雷恩第一大学信息和通信专业博士学位（1992）。
主要从事超大规模集成电路设计领域的技术研究和开发工作。研究方向：高速定制数字电路设计技术、信号处理器体系结构、重构并行计算体系结构、高可靠硬件体系结构。我国第一个自主设计的智能卡芯片主要设计者，该项目对我国"金卡工程"的实施具有重要影响；承担过多项国家基金项目、863重点项目、国家重大专项课题等。教授本科生和研究生数字集成电路设计方面的课程，培养博士研究生近20人。获得国家级科技进步奖1项和省部级科技进步奖2项，近五年发表学术论文50余篇。

代表性论著
Mitigating FPGA Interconnect Soft Errors by In-Place LUT Inversion, ICCAD2011
Statistical Estimation and Evaluation for Communication Mapping in Network-on-Chip, Integration, the VLSI Journal, 43(2), pp 220-229, 2010
Effective Multi-Standard Macroblock Prediction VLSI Design for Reconfigurable Multimedia Systems, IEEE ISCAS2011
Fault Modeling and Characteristics of SRAM-Based FPGAs，FPGA2011
 
 
5、施国勇
研究方向  集成电路设计自动化、超低电压电路技术, 
联系方式  联系电话：021-34204546 x 1064
Email：shiguoyong@ic.sjtu.edu.cn
 
个人简介
施国勇现任上海交通大学微电子学院教授、博士生导师。
1987年7月毕业于复旦大学数学系应用数学专业。1997年3月获日本京都工艺纤维大学电子与信息科学工学硕士。2002年8月获美国华盛顿州立大学电气工程哲学博士。2002年8月至2005年6月任美国华盛顿大学(西雅图)电气工程系博士后研究员。主要从事集成电路设计自动化工具教学研究。研究内容包括高速互连系统建模分析方法学、模拟电路自动综合方法学、极低功耗模拟电路设计技术等。已在国际一流学术期刊和会议上发表60多篇论文。自2006年以来主持三项国家自然科学基金面上项目；获得2007年上海市浦江人才基金；获2010年教育部博士学科点科研基金。他编写的教材《数字信号处理FPGA电路设计》于2010年由高等教育出版社出版。他领导的EDA实验室与美国Synopsys公司有长期研究合作关系。施国勇是 2007年IEEE电路与系统协会Donald O. Pederson最佳论文奖获得者。他是IEEE高级会员。

Guoyong Shi received the Bachelor's degree in applied mathematics from Fudan University, Shanghai, China, the Master of Science degree in electronics and information science from Kyoto Institute of Technology, Kyoto, Japan, and the Ph.D. degree in electrical engineering from Washington State University, Pullman, USA, in 1987, 1997, and 2002, respectively.

He is currently a Professor with the School of Microelectronics, Shanghai Jiao Tong University in Shanghai, China. Before joining the university in 2005, we was a Post-Doctoral Research Scientist with the Department of Electrical Engineering, University of Washington, Seattle, USA. He is the author or co-author of over 60 technical articles in the areas of systems, control, and integrated circuits. His current research interests include the development of design automation tools for analog, mixed-signal, radio-frequency integrated circuits and systems, and circuit design techniques for ultra-low voltage systems..

Dr. Shi was a co-recipient of the Donald O. Pederson Best Paper Award from the IEEE Circuits and Systems Society in 2007. He is a Senior Member of IEEE.
 
代表性论著 (Recent Publications)
Zhigang Hao, Guoyong Shi, Sheldon X.-D. Tan, and Esteban Tlelo-Cuautle, “Symbolic moment computation for statistical analysis of large interconnect networks,” IEEE Transactions on Very Large Scale Integration Systems, 2012, in press.
Yuanzhe. Wang, Zheng Zhang, Cheng-Kok Koh, Guoyong Shi, Grantham K. H. Pang, and Ngai Wong, “Passivity enforcement for descriptor systems via matrix pencil perturbation,” IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 31, no. 4, April 2012, pp. 532-545.
Guoyong Shi, “A survey on binary decision diagram approaches to symbolic analysis of analog integrated circuits,” Analog Integrated Circuits and Signal Processing, 2011, Springer Online First.
Z. Hao, S. X. –D. Tan, R. Shen, and Guoyong Shi, “Performance bound analysis of analog circuits considering process variations,” Proc. IEEE/ACM Design Automation Conference (DAC), June 2011, pp. 310-315.
Guoyong Shi, “Computational complexity analysis of determinant decision diagram,” IEEE Trans. on Circuits and Systems II: Express Briefs, vol. 57, no. 10, pp. 828-832, Oct. 2010.
Guoyong Shi, B. Hu, and C.-J. R. Shi, “On symbolic model order reduction,”  IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems,  vol. 25, no. 7, pp. 1257-1272, July 2006. (2007 IEEE Donald O. Pederson Best Paper Award.) 
C.-J. R. Shi, M. W. Tian, and Guoyong Shi, “Efficient DC fault simulation of  nonlinear analog circuits: One-step relaxation and adaptive simulation continuation,” IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems,  vol. 25, no. 7, pp. 1392-1400, July 2006.
Guoyong Shi and C. -J. R. Shi, “Model order reduction by dominant subspace projection: error bound, subspace computation and circuit applications,” IEEE Trans. Circuits and Systems Part I: Regular Papers, vol. 52, no. 5, pp. 975-993, May 2005.
Guoyong Shi, “A simple implementation of determinant decision diagram,” Proc. International Conference on Computer-Aided Design (ICCAD), 2010, pp. 70-76.
 

6、周健军
研究方向  集成电路设计,生物电子 
联系方式  联系电话：34204546-1062
Email：zhoujianjun@sjtu.edu.cn

周健军博士1991年获上海交通大学电子工程学士学位，1998年获美国俄勒冈州立大学电子工程博士学位。周健军博士于1998年加入美国高通公司，工作至2006年底。期间主要从事无线通讯模拟射频集成电路芯片的研究和设计。他曾领导设计成功世界上第一个CMOS CDMA的传送器芯片和世界上第一个CMOS CDMA的传送接受器芯片。他所领导设计的芯片在世界范围内已被应用于超过三亿部移动电话中。周健军博士于2007年1月成为上海交通大学教授，同时成立并担任模拟射频集成电路中心(CARFIC)主任。回国工作以来主持和参与了多个国家研究项目, 包括四项国家重大科技专项, 一项863重点项目, 一项863面上项目, 一项国家自然科学基金等。 他目前的主要研究方向是混合信号/模拟/射频芯片设计,特别针对无线通信系统以及生物医疗电子等领域的应用。
周健军博士已发表国际学术论文50余篇, 包括1篇 IEEE Journal of Solid-State Circuits (JSSC), 2篇IEEE Transactions on Circuits and Systems (TCAS)以及3篇IEEE International Solid-State Circuits Conference (ISSCC)和2篇 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)。 他还荣获 1998 年度 ISSCC 的 Beatrice Winner Award 论文奖。 周健军博士还获得模拟射频 IC 设计领域的三项美国专利以及两项中国专利。 周健军博士是 IEEE 高级会员(2005-至今) 。

Dr. Jianjun Zhou received the B.S. degree in electronic engineering from Shanghai Jiao Tong University in 1991, and the Ph.D. degree in electrical and computer engineering from Oregon State University, USA, in 1998, respectively.
From 1998 to 2006, he worked at Qualcomm on several chips for wireless communications. He led the efforts on developing both the world's first CMOS Tx IC and world's first CMOS Transceiver IC for CDMA, each with a shipment exceeding 100 million units. He also worked at Motorola, Inc. and engaged in the development of BiCMOS analog/RF IC's. In 2007, Dr. Zhou became a professor in the School of Microelectronics at Shanghai Jiao Tong University, and the director of Center for Analog/RF Integrated Circuits (CARFIC). His current research interests include analog/RF IC design for wireless communications and bioelectronics. 
Dr. Zhou has published 1 JSSC, 2 TCAS, 3 ISSCC, and 2 RFIC, along with dozens of other technical papers. He is the recipient of 1998 ISSCC Beatrice Winner Award. Dr. Zhou has more than a dozen IC design patents (US and China) granted and pending. Dr. Zhou is a Senior Member of IEEE (since 2005).

代表性著作(过去2年)/Selected Publications (past 2 years)

1. Jing Jin, Xiaoming Liu, Tingting Mo, and Jianjun Zhou, “Quantization Noise Suppression in Fractional-N PLLs Utilizing Glitch-Free Phase Switching Multi-Modulus Frequency Divider”, IEEE Transactions on Circuits and Systems I (TCAS-I), pp. 926-937, May 2012. 
2. T.T. Yan, X.B. Shen, J. Jin, J.J. Zhou, “Area-efficient programmable switched-capacitor-based peak detector”, Electronics Letters, issue 3, vol. 48, Feb. 2012.
3. Dongpo Chen, Taotao Yan, Jing Jin, Cui Mao, Yuxiao Lu, Wenjie Pan, and Jianjun Zhou, “A Tri-mode Compass/GPS/Galileo RF Receiver with All-digital Automatic Gain Control Loop”,　　Journal of Analog Integrated Circuits and Signal Processing, January 2012, pp. 69-77, Digital Object Identifier (DOI) 10.1007/s10470-011-9656-z.
4. Jun Wu, Peichen Jiang, Dongpo Chen, and Jianjun Zhou, “A Dual-Band GNSS RF Front-End with a Pseudo-Differential LNA”, IEEE Transactions on Circuits and Systems II (TCAS-II), vol. 58, pp.134-138, March 2011.
5. Hui Wang, Wufeng Wang, Jing Jin, Dongpo Chen, and Jianjun Zhou, “Anti-Interference Pseudo-Differential Wideband LNA for DVB-S.2 RF Tuners ”, IEEE International Symposium on Circuits and Systems (ISCAS), May, 2012, Seoul, Korea
6. Jinbo Li, Dongpo Chen, Rui Guan, Peng Qin, Zhijian Lu , and Jianjun Zhou, “Low-Power High-Linearity Area-Efficient Multi-Mode GNSS RF Receiver in 40nm CMOS ”, IEEE International Symposium on Circuits and Systems (ISCAS), May, 2012, Seoul, Korea
7. Zhijian Lu, Peichen Jiang, Tingting Mo, and Jianjun Zhou, “Adaptive Calibration of IIP2 in Direct Down-Conversion Mixers With Modified LMS Algorithm”, IEEE International Symposium on Circuits and Systems (ISCAS), May, 2011, Rio, Brazil
8. Xiaoming Liu, Jing Jin, Cui Mao, and Jianjun Zhou, “Linear Range Extensible Phase Frequency Detector　　and Charge Pump for Fast Frequency Acquisition” , IEEE International Symposium on Circuits and Systems (ISCAS), May, 2011, Rio, Brazil
9. Dongpo Chen, Wenjie Pan, Peichen Jiang, Jing Jin, Jun Wu, Junzhang Tan, Chao Lu, Jianjun Zhou, “A Reconfigurable Dual-Channel Tri-Mode All-Band RF Receiver for Next Generation GNSS”, IEEE Asian Solid-State Circuits Conference (A-SSCC), Nov. 2010, Beijing, China


7、付宇卓
研究方向：高性能计算机体系结构设计，高可靠性计算机体系结构设计、专用数字集成电路设计 
联系方式：Tel：86-021-34206873
Email：yzfu@sjtu.edu.cn
http://icat.sjtu.edu.cn
 
个人简介
付宇卓教授，上海交大微电子学院副院长，哈尔滨工业大学计算机系计算机系统与结构专业博士、国防科技大学计算机系软件专业本科，美国华盛顿大学、加拿大康考迪亚大学访问学者。
  长期从事SoC芯片系统结构设计、高性能多核系统架构设计、高性能高可靠片上网络结构设计、高性能无线传感器自组织系统等领域的研究。自2002年起先后参与国家863重大专项2项、总装预研1项、国家发改委项目1项、国家教育部2项课题任务。承担上海市AM 基金项目“基于移动多媒体应用的多核处理器关键性结构及其可测性技术研究”、上海市经信委“集成电路公共服务平台建设”、上海市航天基金“航天用LDPC编解码系统设计”、“微电子火工品专用通讯协议技术研究”等多个课题研究。目前正领导IBM合作项目“众核系统重构结构”、CISCO合作项目“NoC容错虚拟化技术”。以第一及通讯作者在国内外期刊、会议发表论文60余篇。曾在诸多国际会议上担任大会副主席、分会场主席和审稿人。上海市经委集成电路项目组专家、上海市科委领域预见专家、上海市集成电路行业协会常务理事。担任《计算机学报》、《计算机学报（英文）》、《电子学报》等刊物审稿人。
近三年发表的主要相关论著：
Jiajia Jiao, Yuzhuo Fu, RAPA: Reliability-Aware Priority Arbitration strategy for Network on Chip, 22th GLSVLSI 2012 Conference.
Jiang Wang1, Liang Dong2, and Yuzhuo Fu1 Modeling of UHF voltage multiplier for radio-triggered wake-up circuits International Journal of Circuit Theory and Applications, Jul,2010(IF-2.01)
Jiajia Jiao, Yuzhuo Fu Architecture-level analysis and evaluation of transient errors on NoC Norchip 2011
Jiajia Jiao, Yuzhuo Fu, A Physical Express Link Addition Methodology for Network on Chip, NoCArc 2011
Wenqi Bao, Jiang Jiang, Qing Sun and Yuzhuo Fu A Reconfigurable Macro-Pipelined Systolic Accelerator Architecture FPT 2011(India)
李宇飞,王琴,付宇卓“A High-performance Low Cost Inverse Integer Transform Architecture for AVS Video Standard” 上海交通大学学报(英文版),  2008年 01期
王兵,付宇卓 “Design of a Low Power DSP with Distributed and Early Clock Gating” Journal of Shanghai Jiaotong University,上海交通大学学报(英文版), 2007年 05期 
付宇卓，胡铭曾, "运动估计芯片中的Cache设计", 计算机研究与发展,2000:36(10)
付宇卓，胡铭曾, “运动估计芯片中搜索区域局存容量的设计原则”　计算机研究与发展 2000.10
付宇卓，胡铭曾, “运动估计芯片中一种降低运算阵列端口数的方法” 计算机研究与发展，1999:36(8),pp943-947
 

8、蒋江
研究方向  微处理器微体系结构，高性能加速器体系结构 
联系方式  联系电话：021-34204546-1036
Email：jiangjiang@ic.sjtu.edu.cn
 
个人简介
    长期从事国家战略核心高技术项目－自主CPU的研究。2002年起先后参研国家"863"微处理器方向重大项目两项，对项目的立项、实施、决策以及组织管理方面做出重大的贡献。2006年起协助组织实施国际上第一款64位流处理器的研究工作，相关论文发表在国际体系结构顶级会议ISCA'07上。2008年起协助组织实施高性能多核多线程微处理器的研究工作。此外，主持国家自然科学基金面上项目一项，参研其它自然科学基金重大项目、863项目多项。2008年获部委级科技进步一等奖，排名第二。
    在微处理器体系结构方面积累了深厚的理论知识和丰富的工程经验，对Intel IA32/64、 IBM POWER、 SUN SPARC以及MIPS等ISA有深入研究。先后参与采用正、反向设计技术实现，并实际投片生产的多款采用CISC、RISC、EPIC、VLIW、多线程以及多核多线程结构的微处理器研制任务，研究范围几乎涵盖了所有主流微处理器体系结构。
    学术思想活跃，在国内外期刊、会议上发表高水平论文多篇；提出多项创新技术，获已授权国家发明专利16项，其它多项专利正在实质审查过程中。
    在长期的重大项目工程实践中，探索出一套"以重点工程为驱动的研究生培养模式"，能够在对研究生进行有效组织和管理的同时，充分发挥研究生的主观能动性。培养出的研究生具有良好的科研能力、工程经验和团队精神。
主要研究方向：多核/众核微体系结构、高性能加速器体系结构、软硬件虚拟化技术、容错技术。
 
Dr. Jiang Jiang is currently an associate professor in School of Microelectronics, Shanghai Jiao Tong University. 
As the major participant and subproject leader, he and his colleague have successfully designed and taped out three high performance microprocessor chips, which adopt the IA-64, the stream processor and the multi-core multi-threading architecture separately. These projects are supported by the National 863 program (the National High Technology Research and Development Project of China). Part of their work has been published on ISCA and TPDS. He has already accomplished one project aiming to exploit the thread-level parallelism on EPIC microprocessor, which is funded by NSFC (the Nature Science Foundation of China).
He has published more than thirty papers in conferences and journals. He owns 16 patents, which mainly focus on microprocessor field.
Dr. Jiang’s research interests include many-core microarchitecture, high performance accelerator architecture, SW/HW virtualization techniques and fault tolerance techniques.
 

9、祝永新
研究方向  计算机系统结构，计算机应用技术 
联系方式  联系电话：34204546-1037
Email：zhuyongxin@sjtu.edu.cn
 
个人简介
祝永新现任上海交通大学微电子学院副教授,博士生导师。获得新加坡国立大学计算机专业博士。曾担任美国安全第一网络银行软件公司(S1 Incorporation)高级咨询师、新加坡国立大学博士后研究员, 香港科技大学访问学者，并曾在上海交通大学计算机系任教。在海外的学术和工业界有十年的工作学习经验。近年在国际学术期刊和会议上发表论文约五十篇，参与编写国际学术专著一部，申请发明专利16项，已授权3项，并担任三十多个国际会议和期刊的程序委员会主席、公共事务主席、分会场主席、技术委员会委员或评阅人，IEEE高级会员，ACM会员，中国计算机学会高级会员，新型计算结构与应用产业技术创新战略联盟专家, 美国物联网进展期刊(Advances in Internet of Things) 编委。参与和承担国家863重点项目、国家发改委示范项目、国家自然科学基金、上海浦江人才计划、上海国际合作项目、上海交大医工（理）交叉重大项目等主要项目。

主要研究方向为计算机系统结构、嵌入式系统、医疗电子、多媒体、SoC和芯片系统级设计等。 

Yongxin Zhu (Winson) has been an Associate Professor of the School of Microelectronics, Shanghai Jiao Tong University since 2006. Prior to that, he worked for National University of Singapore as a Research Fellow in 2002-2005. He worked as a Senior Consultant for S1 Incorporation (Inventor of Security First Internet Banking in the world) in 1999-2002. He also worked for the Department of Computer Science and Engineering, Shanghai Jiao Tong University in 1994-1995. He was a visiting scholar at Hong Kong University of Science and Technology in 2006.

He is a Senior Member of IEEE and China Computer Federation (CCF). He is also a professional member of ACM.　　He received his Ph.D. in C.S. from National University of Singapore in 2001.He published around 50 English conference/journal papers and 30 Chinese journal papers. He also served around 30 conferences and journals as editor, program chair, publicity chair, TPC member and reviewer. He has filed 16 Chinese patent applications, among which 3 patents have been approved. In SJTU,　　he has been PI or Co-PI of 10 projects including ones sponsored by national 863 high-tech program, national development and reform commission, and natural science foundation and Shanghai municipality.

His research interest is in computer architectures, embedded systems, medical electronics and multimedia. The incomplete of publications　　can be found at DBLP:
http://www.informatik.uni-trier.de/~ley/db/indices/a-tree/z/Zhu:Yongxin.html 


代表性论著/SELECTED PUBLICATIONS
Selected Recent Journal Papers:

Yingjie Cao, Yongxin Zhu,Guoguang Rong, Zhongduo Lin, Guoxing Wang　　and Zonghua Gu, Mohamad Sawan, Efficient Optical Pattern Detection for Microcavity Sensors based Lab-on-a-Chip, IEEE Sensors,　　12(6): 2121-2128, 2012

Chao Wu, Guoguang Rong, Junteng Xu, Shengfei Pan and Yongxin Zhu, Physical Analysis of the Response Properties of Porous Silicon Microcavity Biosensor, Elsevier Physica E, 44(7–8): 1787–1791, 2012 

Jiayin Li, Meikang Qiu, Jian-Wei Niu, Yongxin Zhu, MeiqinLiu, Tianzhou Chen, Three-Phase Algorithms for Task scheduling in Distributed Mobile DSP System with Lifetime Constraint, Journal of Signal Processing Systems(Springer), 67(3), 239-253, 2012 

Yongxin Zhu, Liping Fan, On Robust Hybrid Force/Motion Control Strategies Based on Actuator Dynamics for Nonholonomic Mobile Manipulators, Journal of Applied Mathematics, (in press, doi:10.1155/2012/920260), 2012

Liang XIA, Yongxin ZHU, Jun YANG, Jingwei YE, Zonghua GU,　　Implementing a Thermal-aware Scheduler in Linux Kernel on a Multi-core Processor, The Computer Journal, (Oxford University Press), 53(7):895–903, September 2010 

Xiuqiang He, Zonghua Gu, Yongxin Zhu, Task Allocation and Optimization of Distributed Embedded Systems with Simulated Annealing and Geometric Programming, The Computer Journal, (Oxford University Press), 53(7):1071–1091, September 2010. 

Naifeng Jing, Weifeng He, Yongxin Zhu, Zhigang Mao, Statistical Estimation and Evaluation for Communication Mapping in Network-on-Chip, Integration, the VLSI Journal, (Elsevier) , 43(2), pp 220-229, 2010

Wei Hu, Yongxin Zhu, Zonghua Gu, Lei Jiang, Pre-synthesis Resource Generation and Estimation for a Transport-Triggered Architecture (TTA)-Like Architecture, Journal of Microprocessors and Microsystems (Elsevier), 32(4), pp 234-242, 2008

Selected Recent Conference Papers:
Shi Shu, Xiang Shen, Yongxin Zhu, Tian Huang, Shunqing Yan and Shiming Li,　　Prototyping Efficient Desktop-as-a-Service for FPGA Based Cloud Computing Architecture, Proc. of IEEE Cloud Conference (Cloud) pp. 707-709, U.S. A, 2012
Qiannan Zhang, Dongyang Wang, Tian Huang, Yongxin Zhu, MeiKang Qiu, Ming Ni, Guangwei Xie, Modelling provenance in food supply chain to trace and trace foodborne disease, Proc. of　　4th International Conference on Computer Modeling and Simulation (ICCMS) 2012, pp.69-75, Hong Kong.
Jibo Yu, Yongxin Zhu, Liang Xia, Meikang Qiu, Yuzhuo Fu, Guoguang Rong, Grounding High Efficiency Cloud Computing Architecture: HW-SW Co-Design and Implementation of a Stand-alone Web Server on FPGA, Proc. of the Fourth International Conference on the Applications of Digital Information and Web Technologies (ICADIWT 2011),Wisconsin, U.S.A., pp. 124-129, 2011
Yingjie Cao, Yongxin Zhu, Guoguang Rong, Gang Cheng, Meikang Qiu, Efficient Pattern Detection for Embedded Optical Bio-sensing System, Proc. of IEEE Conference on Embedded Computing (EmbeddedCom) 2011, pp.259-265, Sydney, Australia, December 2011

Selected Recent Book:
Keqiu Li, Geyong Min, Yongxin Zhu, Meikang Qiu, Wenyu Qu, Proc. of IEEE International Conference on Scalable Computing and communications; and the 8th conference on Embedded Computing, IEEE Computer Society, ISBN:978-0-7695-3825-9, September 2009

Selected Award: IEEE Best Paper Award
Zhe Zheng,　　Yongxin Zhu,　　Xu Wang,　　Meikang Qiu, Zhiqiang Que,　　Tian Huang,　　Hui Wang, Xiaojing Yin,　　and Guoguang Rong, Revealing Feasibility of FMM on ASIC: Efficient Implementation of N-Body Problem on FPGA, Proc. of 13th IEEE International Conference on Computational Science and Engineering (CSE-2010), pp. 132-139, 2010 (2 best papers from 230 submissions)