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Carrier transport mechanisms in semiconductor nanostructures and devices

本站小编 Free考研考试/2022-01-01




1.
Introduction




Semiconductor nanostructures are of great interest and importance to the research community due to their novel properties and interdisciplinary applications such as in nanoelectronics[18], nanophotonics[911], bio-sensing[1216], optoelectronics[1724], and solar cells[2533]. Semiconductor nanostructures are also being considered as potential building blocks of post CMOS devices to sustain the scaling of devices[34]. Semiconductor nanostructures represent a unique system with one, two or three quantum confined directions for electron transport. Due to this semiconductor nanostructures have different electrical properties as compared to their bulk counterparts. High performance modern electronic devices can be designed by knowing the charge transport in semiconductor nanostructures and gaining control over it. Therefore, for utilization of semiconductor nanostructures in nanoelectronic devices it is extremely important to understand the electrical properties of these nanostructures. In order to probe the electrical properties of an individual nanostructure, electrical contacts must be made with the nanostructure. Owing to the small size of the nanostructure, this may not be an easy task. A rich variety of methods have already been developed and used for contacting individual nanostructures to explore their electron transport properties. Making an electrical contact to a cluster of nanostructures could be relatively easy. This review focuses on presenting an overview of such methods e.g. nano-fabricated electrodes, microscopy based methods and focused ion beam (FIB) techniques, and the current status of the research in this regard. This is followed by an overview of different types of transport mechanisms that are usually observed in nanostructures (e.g. thermally activated transport, space charge limited current, and hopping transport). In explaining these mechanisms, effort has been made to explain how various material parameters can be extracted from the measured I–V characteristics.




2.
Making electrical contacts to semiconductor nanostructures





2.1
Fabrication of electrical contacts using lithography




Nanoelectronic devices utilizing single or multiple nanostructures can be fabricated using lithography in conjunction with standard microfabrication techniques. Fig. 1(a) shows a schematic diagram of a single nanowire device that can be used to measure the electrical properties of a semiconductor nanowire. The device is fabricated on an SiO2 layer (~ 100 nm) grown thermally on the top-Si layer of SOI material. The top-Si layer is usually heavily doped and may be used as a back-gate. However, in this paper the effect of the gate on the electrical properties is not considered. Electrical contacts to multiple nanostructures such as nanowire forests and nanocrystal assemblies can be achieved using microfabrication techniques as well. As an example, Fig. 1(b) shows a scanning electron microscope (SEM) image of a nanowire device.






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Figure1.
(Color online) (a) Schematic diagram of a single nanowire device. (b) SEM image of a silicon nanowire contacted by microfabricated electrodes.




By using FIB induced metal deposition techniques, electrical contacts can be deposited to individual nanostru cture[3538]. An added advantage of the technique is that it can be used to sputter the oxide around the nanowire before deposition of contacts[39]. D’Ortenzi et al.[40] compared the FIB and lithography methods to form electrical contacts to silicon nanowires. They found that FIB is an efficient technique but lots of effort is required to avoid contamination. The lithography technique is a relatively cleaner method but the formation of a Schottky barrier at an electrical contact and nanowire interface cannot be avoided.



Atomic force microscope (AFM) nanolithography[41, 42] is based on spatial confinement of chemical reactions and can be used to fabricate electrical contacts[43] to nanowires and thin films[44] as well as to fabricate nanodevices[41].




2.2
Microscopy based techniques to contact nanostructures




Conducting atomic force microscopy (C-AFM) utilizes conducting probes to measure I–V characteristics of nanostructures. This technique is also referred to as conducting probe atomic force microscopy (CP-AFM). The working principle of the technique is illustrated in Fig. 2 for electrical measurement of lateral and vertical nanowires. In Fig. 2(a) one side of the nanowire on SiO2 is contacted with a micro-fabricated electrode and the conducting probe is positioned at desired points on the nanowire. A bias is applied to the conducting tip, and the resulting tip-sample current can be measured using external electronics. The added advantage here is that images of the nanowire can be taken before and after the electrical measurements using the AFM in tapping mode. Fig. 2(b) illustrates that C-AFM can also be used to record I–V characteristics of vertical nanowires. More details about AFM as an electrical characterization tool for semiconductors in general can be found elsewhere[41].






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Figure2.
(Color online) C-AFM experimental arrangements for electrical measurements of (a) a lateral nanowire and (b) a vertical nanowire.




C-AFM has been used to measure the resistivity of silicon nanowires grown by a chemical vapour deposition method using PtSi as catalyst[45], the electrical and photoconductive properties of individual ZnO nanowire[46], to confirm that SiO2 coated CdTe nanowire had been properly insulated from the substrate, by comparing the I–V characteristics from coated and uncoated structures[47], to investigate the electrical properties of ZnO nanowires[48, 49], to measure the electrical and photoelectrical properties of the ZnO nanowire photodiode[50] and to study the electrical properties of nanoparticles and thin films[51, 52]. Using this technique, Zhou et al.[53, 54] measured the electron transport in InAs nanowire at different spacings between the fabricated electrode and the C-AFM tip. They demonstrated that for a tip-electrode spacing of less than 200 nm current ?ow was ballistic. For larger distances, the resistance increased linearly with distance as expected.



Erts et al.[55] used the arrangement shown in Fig. 2(b) to investigate the longitudinal conductivity of Ge nanowires in an anodic alumina template. Recently, Alvarez et al.[56] used C-AFM to study electrical properties of horizontal and vertical silicon nanowires.



SEM, transmission electron microscope (TEM) and scanning tunneling microscope (STM) has also been used to study electrical properties of nanostructures and nanodevi ces[57].




3.
Transport mechanisms in semiconductor nanostructures




The most frequently observed transport mechanisms that were observed while analyzing I–V characteristics of semiconductor nanostructures are discussed in this section.




3.1
Space charge limited current (SCLC) transport




SCLC is a bulk limited transport mechanism and is often observed in materials with low free charge carrier concentration and ohmic contacts. In the SCLC transport mechanism[58, 59] if contacts are capable of injecting more charge into a material than the intrinsic charge, then the excess injected charge controls the current flow. Material features such as trap distribution in the energy band gap, position of the Fermi energy and the charge carrier mobility can be obtained by applying the SCLC model.




3.1.1
Trap free SCLC



In case of trap free SCLC, the current density, JTF, is given by[60],









$${J_{
m TF}} = {frac{{9mu varepsilon V}}{{8{L^3}}}^2}, $$

(1)



where ε is the material’s dielectric constant, L is the sample thickness (channel length), μ is the charge carrier mobility, and V is the applied voltage. However, Eq. (1) is valid for field independent μ and is also referred to as Child’s law or the square law for trap free SCLC. However, it does not necessarily imply trap free material as Eq. (1) is also valid if the traps in the material have been filled.



For conductors with small diameter and high aspect ratio such as a semiconductor whiskers Eq. (1) is invalid[48]. Talin et al.[61, 62] developed a model to explain SCLC in nanowires with $R/L ll 1$. Here R is the radius of the nanowire and L is the length of the nanowire. The model can be described by the equation:









$${J_{{
m{NW}}}} = {zeta _0}{left( {frac{R}{L}}
ight)^{ - 2}}varepsilon mu frac{{{V^2}}}{{{L^3}}}.$$

(2)



The constant $zeta $0 is approximately unity. Initially at very low voltages ohmic behavior (Johmic = neμ(V/L) is observed. The transition from ohmic to SCLC behavior occurs at a transition voltage Vt. At this voltage, the two current densities are equal i.e. JNW = Johmic. Therefore, by determining Vt from the experimental I–V characteristics, carrier concentration can be determined. For nanowires:









$$n = frac{{varepsilon {V_{
m t}}}}{{e{R^2}}}.$$

(3)



Talin et al.[61] investigated I–V characteristics of InAs nanowires using a nanoprobe. Fig. 3 shows the I–V curves of these nanowires as a log–log plot. The top left inset shows an image of the probe contacting one of the InAs NWs. The lower inset shows the I–V curves on the linear scale. An ohmic regain at lower voltages followed by the SCLC region can be clearly identified from the plot. By determining the transition voltage Vt from this plot, mobility and carrier concentration of InAS nanowires were calculated using Eqs. (2) and (3). Here the extracted carrier concentration range was (0.5 ± 0.3) × 1017–2.5 × 1017 cm?3, whereas the approximate mobility range was from 10–3500 cm2/(V·s). The nanoprobe data shows that as the nanowire radius increases, mobility increases and n decreases. However, results obtained from FET geometry did not show such trends. The nanoprobe data as well as the trends are in reasonable agreement with recent transport measurements on InAs nanowires using the top-gate FET geometry reported by Dayeh et al.[63].






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Figure3.
(Color online) I–V curves for three InAs nanowires plotted on a log–log plot. Top inset shows an SEM image of a probe in contact with nanowire. The lower inset shows I–V curves on linear scale. From Ref. [61].




Using this SCLC model for nanowires Katzenmeyer et al.[64] showed that n and μ of InAs nanowires is diameter dependent. The nonlinear I–V characteristics of the GaN nanorod have also been explained using the SCLC model for nanowires[62].



Using this model Zhao et al.[65] derived n to be ~1013 –10?15 cm?3 for InN nanowires depending on the radius of nanowires, and the range is in excellent agreement with the values of n obtained from the photoluminescence analysis[66]. They also calculated μ from the ohmic region of I–V curves, which was found to be 8000–12 000 cm2/(V·s) for n~1 × 1013 cm?3 and is in reasonable agreement with theoretical calculations[67].




3.1.2
SCLC with traps



Traps are inevitable in materials prepared in the laboratory. Transport properties of nanowires are affected by traps such as surface traps that cause carrier depletion. The surface trap in nanowires can easily be incorporated during growth.



As long as greater charge is injected than the intrinsic charge, the magnitude and voltage dependence of the current are governed by the density and energy distribution of the traps. In case of exponential distribution of traps and holes, transport states are assumed to exist below an energy (above for electrons). The trap distribution exists above (below for electrons) these transport states. The presence of the trap distribution causes a reduction in free charge carriers and hence current. If a voltage is applied, the Fermi level moves (rises for electrons) towards the valance band in the energy gap (conduction band for electrons), thus filling any trap sites above (below for electrons) the Fermi level and making them unavailable to trap charge carriers. Therefore, as the injected charge increases, free carrier density increases rapidly resulting in a corresponding increase in the current[59].



To simplify the analysis of SCLC with an exponential distribution of traps it is assumed that only injected single carriers (holes or electrons) are considered, μ is field-independent and that the concentration of free charge carriers is much less than the concentration of trapped charge carriers.



For traps that are exponentially distributed within the energy band gap, the distribution function for the trap density can be written as[58, 68]:









$$hleft( E
ight) = frac{{{H_{
m t}}}}{{{E_{
m t}}}}exp left( {frac{{-E}}{{{E_{
m t}}}}}
ight), $$

(4)



where E is the relative energy measured from the bottom of conduction band. This trap distribution gives a power law dependence of the current density on the applied voltage and is given by:









$${J_{
m SCLC}} = {q^{1-l}}mu {N_{
m DOS}}{left( {frac{{2l + 1}}{{l + 1}}}
ight)^{l + 1}}{left( {frac{l}{{l + 1}}frac{varepsilon }{{{H_{
m t}}}}}
ight)^l}frac{{{V^{l + 1}}}}{{{L^{2l + 1}}}}. $$

(5)



where Ht is the trap density, Et is the characteristics constant of the distribution and is often written in terms of characteristic trap temperature Tt (Et = kBTt, kB is the Boltzmann constant), NDOS is the density of states (DOS) in the relevant band, l = Tt/T, here T is the measurement temperature. Eq. (5) clearly shows the power law dependence of the form JVm with m = l + 1.



Since l = Tt/T, m = l + 1 can be written as m = (Tt/T) + 1. As Tt = Et/kB, m can be expressed as:









$$m = left( {frac{{{E_{
m t}}}}{{{k_B}T}}}
ight) + 1.$$

(6)



The parameter m is the slope of the logJSCLC–logV plot at all measurement temperatures. From Eq. (6) it is clear that, once m is known for all measurement temperatures, characteristic energy Et can be determined from the slope of a plot of m versus 1/T.



An Arrhenius form of the Eq. (5) is given below[69]:









$${J_{
m SCLC}} = left( {frac{{{mu _{
m p}}{N_{
m v}}qV}}{L}}
ight)fleft( l
ight)exp left[{-frac{{{E_{
m t}}}}{{kT}}ln left( {frac{{q{H_{
m t}}{L^2}}}{{2varepsilon V}}}
ight)}
ight],$$

(7)



where









$$fleft( l
ight) = {left( {frac{{2l + 1}}{{l + 1}}}
ight)^{l + 1}}{left( {frac{l}{{l + 1}}}
ight)^l}frac{1}{{{2^l}}}.$$

(8)



For l > 2, f(l) ~ 0.5, Eq. (7) therefore becomes:









$${J_{
m SCLC}} = frac{1}{2}left( {frac{{{mu _{
m p}}{N_{
m v}}qV}}{L}}
ight)exp left[{-frac{{{E_{
m t}}}}{{kT}}ln left( {frac{{q{H_{
m t}}{L^2}}}{{2varepsilon V}}}
ight)}
ight].$$

(9)



This clearly gives activation energy:









$${E_{
m a}} = frac{{{E_{
m t}}}}{k}ln left( {frac{{q{H_{
m t}}{L^2}}}{{2varepsilon V}}}
ight),$$

(10)



where Ea is the slope of logJSCLC versus 1/T curves at certain voltage. Et can be obtained from Eq. (6). Parameters L, V, ε and q are known for a particular experiment. Therefore, the trap density Ht can be estimated by determining the slope of the logJSCLC versus 1/T curve at a constant voltage.



Eq. (9) shows that at crossover voltage (where Ea = 0) the current is approximately temperature independent therefore Eq. (10) implies:









$${V_{
m c}} = frac{{q{H_{
m t}}{L^2}}}{{2varepsilon }}.$$

(11)



Here sample thickness L, the electronic charge q and the dielectric constants ε are known for the given material. Vc can be obtained by plotting temperature dependent JSCLCV curves on the log–log plot for two or three temperatures and extrapolating the power law. The trap density Ht then can be determined from Eq. (11). This is a much simpler approach as compared to other approaches for the determination of the trap density[70]. The JSCLCV characteristics that can be fitted by the power law JSCLCVm with m > 2, are attributed to SCLC with an exponential distribution of traps [58, 71].



Rafiq et al. reported SCLC with an exponential distribution of traps in 300 nm thick films of size-controlled silicon nanocrystals[70]. The electrical measurements were performed on Al/Si nanocrystal/p-Si/Al structure. Fig. 4(a) shows I–V characteristics of these Si nanocrystal films from 40 to 300 K on the log–log graph with 40 K temperature step. From the graph, it is clear that from 300 to 200 K the I–V curves tend to meet at the cross over voltage. A schematic diagram of the SCLC mechanism with exponential distribution of traps is shown in Fig. 4(b). Fig. 5 shows the power law fits from 300 to 200 K to find the value of the slope m. The inset shows that as temperature decreases m increases. From this curve, characteristic trap temperature Tt and characteristic trap energy Et = kBT can be found. A cross over voltage 17 V was determined from the main graph. Using this cross over voltage, a trap density of 2.4 × 1017 cm?3 in the Si nanocrystal film was determined using Eq. (11). Rasool et al. used the same technique to find out the trap density in vertical silicon nanowire arrays[72].






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Figure4.
I–V characteristics of a 35 × 35 μm2 diode from 300 to 40 K, on a log–log plot. The temperature step is 20 K. The inset shows the I–V characteristics at 300 K, from ?8 to 4 V, on a linear scale. (b) Schematic diagram of SCLC transport. The SiO2 potential barriers in the Si nanocrystal film are omitted for clarity. Carriers (holes) are injected from the p-Si substrate into the film. An exponential distribution of traps nt(E) exists in the film. From Ref. [70].






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Figure5.
Power law fits to the data of Fig. 4 from 280 to 200 K, with a temperature step of 20 K. The fits meet at cross over voltage Vc = 17 V. The inset shows m as a function of inverse temperature. From Ref. [70].




Xu et al.[73] observed SCLC with an exponential distribution of traps in GaSb nanowires. They determined that characteristics trap energy reduces from 0.26 to 0.12 eV after annealing indicating that annealing reduces the deep trap level in the nanowires. They attributed oxygen impurity as a possible trap source in GaSb nanowires.



Schricker et al.[74] investigated temperature dependant I–V characteristics of GaAs nanowires. They observed JSCLCVm dependence with m > 2 indicating the presence of SCLC with an exponential distribution of traps. By using the procedure outlined earlier they obtained characteristic trap energies ranging from 0.024 to 0.11 eV below the band edge. The trap density range was from 1 × 10 3 to 1.2 × 1015 cm?3. From the analysis of I–V curves they concluded that the Fermi level shifts towards the band edge indicating the presence of impurities or the surface state in the nanowires.



SCLCs with traps have been reported in InN nano wires[65] and Si nanowires[56] as well. Liao et al.[75] studied the adsorbates effect on the SCLC in a ZnO nanowire. In this case free carriers are strongly depleted by surface adsorbates and the electron transport properties are dominated by the injected carriers and desorption of oxygen in air and vacuum eliminated SCLC.



From I–V characteristic measurements in vacuum, dry N2, and ambient air it was found that CdS nanowires became more resistive in air[76]. This is attributed to oxygen adsorption from air that depletes the nanowires. These oxygen depleted nanowires exhibited SCLC with an exponential distribution of traps with m > 2. From the m versus 1/T plot, the characteristic trap energy was estimated to be 0.18–0.37 eV with an average value of 0.28 ± 0.04 eV.




3.2
Thermally activated transport




For thermally activated transport the conductivity is given by:









$$sigma = {sigma _0}{
m{exp}}left( { - {E_{
m{a}}}/{k_{
m B}}T}
ight), $$

(12)



where σ0 is a temperature-independent prefactor and Ea corresponds to the thermal activation energy. This type of conduction is usually observed at higher temperatures. For example in the case of FeS2 nanorods[77] thermally activated transport is observed from 300–400 K. However as will be explained later, at lower temperatures hopping transport is observed in these nanorods. Such transport has been observed in single CdS nanowire[76]. Activation energy can be obtained by determining the slope of lnσ versus 1/T plot.




3.3
Hopping conduction




In the hopping conduction mechanism, electrons ‘hop’ from one localized state to another localized state by phonon assisted tunnelling. Hopping conduction is of two types, nearest neighbour hopping (NNH) and variable range hopping (VRH) as shown schematically in Fig. 6. In case of NNH, the electron hop to the nearest neighbor sites and temperature dependence of conductivity is of activation type. However, in case of VRH, an electron does not necessarily hop to a nearest neighbour. Rather, the electron tries to hop to a site that requires the least activation energy for the process.






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Figure6.
Schematic diagram to illustrate the concept of NNH and VRH.




The VRH concept was proposed by Mott[78, 79] and is called Mott’s VRH. A generalized form of Mott’s VRH in d-dimensions is:









$$sigma = {sigma _0}exp {left( {-frac{{{T_{
m M}}}}{T}}
ight)^{frac{1}{{d + 1}}}}, $$

(13)



where σ0 is a constant of proportionality and depends weakly on temperature. The values of σ0 can be found in Ref. [80] and TM is given by:









$${T_{
m M}} = frac{{18}}{{{alpha ^3}Nleft( {{E_{
m F}}}
ight){k_{
m B}}}}, $$

(14)



where α is the localization length and N(EF) is the DOS at the Fermi energy EF. If lnσ versus (1/T)1/(d+1) is plotted then the slope of this graph yields the value of TM. Then using Eq. (14) N(EF) can be obtained if the localization length is known. For 3D Mott VRH, the most probable hopping distance and average hopping energy are given by[81]:









$${R_{{
m{hop}}, {
m{Mott}}}} = frac{3}{8}alpha {left( {frac{{{T_{
m{M}}}}}{T}}
ight)^{1/4}}, $$

(15)



and









$${W_{{
m{hop}}, {
m{Mott}}}} = frac{1}{4}{k_{
m B}}T{left( {frac{{{T_{
m M}}}}{T}}
ight)^{1/4}}.$$

(16)



Figs. 7(a) and 7(b) show the lnσ versus (1/T)1/4 plots for vertical p-Si nanowires/TiO2 nanoparticles and vertical n-Si nanowires/TiO2 nanoparticles hybrid devices, respectively[72]. In both devices, the 3D Mott VRH is the dominant conduction mechanism from 170 to 77 K. By determining the value TM from Figs. 7(a) and 7(b), the values of N(EF) were found to be 8.39 × 1021 and 1.05 × 1021 eV?1 cm3 for p-Si nanowires/TiO2 nanoparticles and n-Si nanowires/TiO2 nanoparticle hybrid devices at 0.5 V, respectively. Fig. 7(c) shows the variation of hopping distance with temperature for both devices. Paschoal et al.[82] found N(EF) = 4.0 × 1018 (eV·cm3)?1 in Mn ion-implanted GaAs nanowire. Imran et al.[83] reported 3D Mott VRH in perovskite CdTiO3 nanofibers and calculated the density of states, minimum hopping distance and hopping energy for the nanofibers using the Mott VRH model. Recently Jian et al.[84] has reported 2D Mott VRH in ZnO nanoflakes. From the 2D Mott VRH data they estimated a localization length of ~7 nm, consistent with the radius of ZnO nanoflake grain determined using TEM.






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Figure7.
(Color online) lnσ versus (1/T)1/4 plot for (a) p-Si nanowires/TiO2 nanoparticles and (b) n-Si nanowires/TiO2 nanoparticles hybrid device. The data clearly obey the 3D Mott variable range hopping mechanism from 170 to 77 K as indicated by the solid line. (c) Minimum hopping distance Rmin versus temperature plot for both devices. Here SiNWs stands for silicon nanowires and NPs stands for nanoparticles. From Ref. [72].




Efros and Shkovskii[80] suggested that in the presence of Coulomb interactions, the value of the exponent in Eq. (13) is $1/2$. They argued that in the presence of Coulomb interactions the DOS for any localized state vanishes at the Fermi level. This Coulomb gap originates due to the electron-hole pairs generated as an electron hops from a site, leaving a hole behind. In this case, the DOS is proportional to (EEF)2. Further, in this case, the activation energy is inversely proportional to the hopping distance. Therefore, the conductivity in this case can be written as[80]:









$$sigma propto exp left[{-{{left( {frac{{{T_{
m ES}}}}{T}}
ight)}^{1/2}}}
ight], $$

(17)



where









$${T_{
m ES}} = frac{{2.8{e^2}}}{{kappa alpha {k_{
m B}}}}, $$

(18)



where κ is the static dielectric constant. Eq. (17) is usually referred to as the Efros-Shkovskii (ES) law for hopping conduction.



Above a crossover temperature Tc the Coulomb interactions can be neglected and conductivity obeys Motts VRH law[81, 85] and below Tc the ES law is valid. The Tc is given by:









$${T_{
m c}} = 16frac{{T_{
m ES}^2}}{{{T_{
m M}}}}.$$

(19)



Below Tc the most probable hopping distance and hopping energy are given by[81]:









$${R_{{
m{hop}}, {
m{ES}}}} = frac{1}{4}alpha {left( {frac{{{T_{
m ES}}}}{T}}
ight)^{1/2}}, $$

(20)



and









$${W_{{
m{hop}}, {
m{ES}}}} = frac{1}{2}{k_{
m B}}T{left( {frac{{{T_{
m ES}}}}{T}}
ight)^{1/2}}.$$

(21)



Haung et al.[81] studied VRH in oxygen deficient polycrystalline ZnO films. They found that in these films the cross over from ES to Mott VRH occurs at a few tens of degree kelvin. From the experimental data, they found the DOS, hopping distance and hopping energy for both ES and Mott VRH cases. Mukherjee et al.[86] observed a crossover from 3D Mott VRH to ES VRH at ~12 K in Sb doped ZnO thin film. The experimentally observed crossover temperature was close to the theoretically calculated crossover temperature (~16 K) using Eq. (19). Li et al.[87] observed a transition from ES to Mott VRH at 25 K in polycrystalline germanium thin films.



At temperatures greater TA, Arrhenius behaviour is observed[85]. The TA is given by









$${T_{
m{A}}} = {left( {frac{alpha }{{4{d_1}}}}
ight)^2}{T_{{
m{ES}}}},$$

(22)



where d1 is the nearest neighbour distance.



Temperature dependent I–V characteristics of FeS2 nanorods using four-probe geometry, from 40–220 K have shown the presence of Mott VRH in these nanorods. However, a thermally activated transport from 300–400 K has been observed with an activation energy 100 meV[77]. Similarly Mott VRH has been observed in GaAs nanowire[88]. Temperature dependant I–V curves of ZnO nanowires prepared by CVD have shown that ES VRH is dominant in ZnO nanowires from 300–6 K[89].



Pichon et al.[90] investigated the temperature dependence of the electrical properties of doped polycrystalline Si nanowires from 200–530 K. The conductivity in these nanowires obeys 3D Mott VRH. From the VRH model they determined the corresponding DOS following exponential distributions linked to the statistical shift of the Fermi level.




3.4
Poole Frenkel conduction




The Poole Frenkel conduction is a bulk limited conduction mechanism. In Poole Frenkel conduction, the trapped charge carriers by impurities in the band gap of a semiconductor can be transferred to the conduction by the applied field. In the case of Poole Frenkel conduction, impurity is regarded as an ionized donor with a hydrogen-like Coulomb potential. For Poole Frenkel conduction, the trap center should be neutral when filled by a charge carrier. On application of an external field potential well distorts (Poole Frenkel barrier reduces by an amount $Delta {varphi _{{
m{PF}}}} = {beta _{{
m{PF}}}}{E^{1/2}}$
) and charge carrier can easily overcome the barrier to go to the conduction band of the semiconductor as shown schematically in Fig. 8.






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Figure8.
(Color online) Schematic diagram of the Poole Frenkel effect. The φPF, Ec and Et represent the Poole Frenkel barrier height, conduction band energy and trap energy respectively.




The Poole Frenkel current density is given by[91]:









$${J_{
m PF}} = {sigma _0}E{
m{exp}}left[{{beta _{
m PF}}{E^{1/2}}/{k_{
m B}}T}
ight].$$

(23)



Here σ0 is low field conductivity and E is average electric field. The Poole Frenkel field lowering coefficient βPF is given by:









$${beta _{{
m{PF}}}} = {left( {frac{{{q^3}}}{{pi {varepsilon _{
m r}}{varepsilon _0}}}}
ight)^{1/2}}, $$

(24)



where εr is the relative dielectric constant, ε0 is permittivity of free space and q is electronic charge. From Eq. (1) it can be seen that in the case of Poole Frenkel conduction a plot of lnJPF against E1/2 should show a linear relationship. From the slope of this plot, the field lowering coefficient can be determined. Once the field lowering coefficient is known, the dielectric constant of the material can be determined from Eq. (24).



Fig. 9 shows the Poole Frenkel curve for atomic layer deposited AlN thin film at applied field in the range 63.8–211.8 MV/m[92]. From the slope of this curve the calculated value of the dielectric constant of the AlN films is 3.8. This value of the dielectric constant of AlN film agrees with the optical and static dielectric constants.






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Figure9.
(Color online) Poole Frenkel plot of AlN thin film. From Ref. [92].




Jeong et al.[93] extracted a value of 2.8 for the dielectric constant of atomic-layer-deposited HfO2 films from the slope of the Poole Frenkel plots. It is known that the optical dielectric constant is equal to the square of the refractive index. The refractive index of HfO2 is 1.7–1.9. Therefore, the extracted value of the dielectric constant of HfO2 films is close to the square of the refractive index. This indicates that Poole Frenkel plots can be used to determine the dielectric constant of materials. Similarly, Son et al.[94] determined appropriately the dielectric constant values of nitrided Hf-silicate gate dielectric. Chiu et al.[95] determined a value of refractive index 1.7 ± 0.1 for Pr2O3 MIS capacitors from Poole Frenkel plots, and it was close to the value obtained by the optical method.



Poole Frenkel data can also be used to calculate trap energies, which helps us to understand the various aspects of traps in a semiconductor. For example, Yeh et al.[96] determined Pool Frenkel trap energies in thin films of Al2O3 and HfxAlyO with different Al and Hf compositions. It is concluded that the trap energy increases with Al content in the HfxAlyO thin film.



The Poole Frenkel conduction mechanism has also been observed in vertical silicon nanowires[97], individual SiC nanowires[98], porous silicon layers[99], ZnO thin films[100], Barium Managanate nanorods[101] and GaAs nanowires[102].




3.5
Schottky emission




Schottky emission is a contact limited process. In this process the barrier formed at the metal semiconductor interface is lowered due to the applied electric field as shown schematically in Fig. 10. According to the thermionic emission model the forward current voltage characteristics of a Schottky contact neglecting the series resistance can be expressed as[103]:






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Figure10.
(Color online) Schematic diagram of Schottky emission.










$$I = {I_{
m s}}left[{exp left( {frac{{qV}}{{n{k_{
m B}}T}}}
ight)-1}
ight], $$

(25)



whereas









$${I_{
m s}} = A{A^*}{T^2}exp left( {-frac{{q{varphi _{
m bs}}}}{{{k_{
m B}}T}}}
ight), $$

(26)



where A is the diode area, Is is the saturation current, n is the ideality factor, A* is Richardson constant (120 A/cm2/K2) and φbs is the Schottky barrier height of the diode. The forward bias current including the diode series resistance (Rs) is given by:









$$I = {I_{
m{s}}}{
m{exp}}left[{frac{{qleft( {V-I{R_{
m s}}}
ight)}}{{n{k_{
m{B}}}T}}}
ight].$$

(27)



Chenung et al. suggested that Eq. (27) can be written as:








$$frac{{{
m{d}}V}}{{{
m{d}}left( {{
m{ln}}I}
ight)}} = frac{{n{k_{
m{B}}}T}}{q} + I{R_{
m{s}}}.$$



Therefore, slope and intercept of the plot of dV/d(lnI) and I will yield series resistance and ideality factor of the diode respectively. To evaluate the barrier height a new function H(I) is defined as follows:









$$Hleft( I
ight) = eta {varphi _{
m b}} + I{R_{
m s}}.$$

(28)



As the ideality factor is already known, the intercept of the plot between H(I) and I will give the barrier height of the diode. Therefore, if I–V characteristics of a metal semiconductor diode are measured, it is possible to find out all three parameters of the fabricated diode. The method was used in Ref. [104] to determine the ideality factor, series resistance and barrier height of Pt/ZnO thin film Schottky diodes. It was found that barrier height, ideality factor and series resistance were 0.71 eV, 2.5 and ~95 ?, respectively. Using the same approach Quereda et al.[105] studied the effect of local strain on all three Schottky diode parameters of atomic force microscope/MoS2 flakes/ITO substrate back to back Schottky diodes. It was found that the resistance of MoS2 flake decreases with an increase in applied load, and the saturation current of the tip-MoS2 barrier increases, indicating a pressure-induced lowering of the barrier potential. However, they found no effect on the ideality factor and saturation current of the flake-substrate diode.



Furthermore Ahmad et al.[106] determined ideality factor and barrier heights for the Au/vertical p+-SiNWs coated with ZnS nanoparticle diodes. Figs. 11(a) and 11(b) show the ideality factors and barrier heights calculated for this diode. A huge deviation of ideality factor in this diode was attributed to the large mismatch of lattice[107]. Moreover, the non-ideal values of the barrier height and ideality factor are attributed to interface specific effects[108111].






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Figure11.
Temperature dependence of a) ideality factor (n) and b) barrier height φb calculated from fitting of the Schottky emission equation of p+-Si nanowires decorated with and without ZnS nanoparticles. Here NWs stand for nanowires and NPs stand for nanoparticles. From Ref. [106].





3.6
FN tunneling




The FN conduction is a contact limited process. It is quantum mechanical phenomena and is the dominant conduction mechanism through thin insulting layers and thin films. Such insulting layers are part of the metal oxide semiconductor (MOS) structures that frequently occur in integrated structures. Fig. 12 shows the FN tunneling process schematically. The FN tunneling current density through an oxide layer is given by[103, 112, 113]:






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Figure12.
(Color online) Schematic diagram of tunnelling through metal insulator metal structure.










$${J_{{
m{FN}}}} = {A_1}{E^2}{
m{exp}}left( { - frac{{{B_1}}}{E}}
ight), $$

(29)



where









$${A_1} = frac{m}{{{m^*}}}frac{{{q^3}}}{{8pi h{varphi _{{
m{bt}}}}}}, $$

(30)









$${B_1} = frac{{8pi }}{3}{left( {2frac{{{m^*}}}{{{h^2}}}}
ight)^{1/2}}frac{{{varphi _{{
m{bt}}}}^{3/2}}}{q}.$$

(31)



Here E, m, m*, h, and φbt are applied field, electron mass, electron effective mass in silicon dioxide, Plank’s constant and the tunneling barrier height at the injecting electrode, respectively. According to this model a plot between log(JFN/E2) and 1/E is a straight line with B1 as the slope. Therefore, by constructing a graph between log(JFN/E2) and 1/E the tunneling barrier height can be found. FN tunneling has been used to determine the FN tunneling parameters of MOS structures[112, 114].



FN tunneling governs the field emission phenomena from semiconductor nanostructures. Field emission is a form of quantum tunneling in which electrons are emitted from a material held at negative biased towards an anode through a vacuum barrier by a strong electric field. Field emission has vast technological applications in various disciplines such as displays and electron microscopy. The field emission current is given by[115]:









$${J_{{
m{FE}}}} = left( {{A_2}frac{{{beta ^2}{E^2}}}{varphi }}
ight){
m{exp}}left( { - {B_2}frac{{{varphi ^{3/2}}}}{{beta E}}}
ight), $$

(34)









$$I = S{J_{{
m{FE}}}}, E = frac{V}{{{d_2}}}, $$

(35)









$${
m{ln}}left( {frac{{{J_{
m FE}}}}{{{E^2}}}}
ight) = {
m{ln}}left( {{A_2}frac{{{beta ^2}}}{varphi }}
ight) - {B_2}frac{{{varphi ^{3/2}}}}{{beta E}}, $$

(36)



where A2 = 1.54×10?6 A·eV·V?2 and B2 = 6.83×103 eV?3/2 V/μm. S is the area of the emitter, V is applied voltage, I is emission current, β is the field enhancement factor, d2 is the distance between the tip of the emitter and the anode, and j is the work function of the emitter. The field-enhancement factor (β = h/r, h is height and r is radius of emitter) is related to emitter geometry. Therefore, longer emitters with sharp tips greatly increase emission current.



Zhao et al.[116] studied the field emission from ZnO nanorod arrays with different morphologies. Figs. 13(a) and 13(b) show JFEE plots and the corresponding FN plot at a working distance of 460 μm for ZnO nanorod arrays respectively. Nanoneedle arrays showed the best field emission properties (Fig. 13(a)). They determined field enhancement factor β from the slope of the FN plot (Fig. 13 (b)), which is a straight line confirming the FN tunnelling. From the data, they found out that the nanoneedle array had the lowest turn on the field, highest β and largest emission efficiency due to the smallest radius.






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Figure13.
(a) JFEE plots of field emission from ZnO nanorod arrays and (b) corresponding FN plots. From Ref. [116].




She et al.[117] studied the correlation between resistance and field emission properties of single one dimensional ZnO nanostructures. They found that field emission from low resistance ZnO emitters is better. Moreover, the high resistance region in ZnO nanostructure causes a vacuum breakdown event. They concluded that the uniform conductivity of nanostructures is important for field emission applications.



Sun et al.[118] showed that field emission properties of graphene were improved by decorating it with ZnO quantum dots. The field emission from semiconductor nanostructures has been the subject of a large number studies[119129].




3.7
Band to band tunnelling




Band-to-band tunneling was first discovered by Zener in 1934[130]. It is a phenomenon in which an electron tunnels from the valence band to the conduction band of a semiconductor through the band gap without the assistance of traps. This phenomenon is being utilized in tunneling field effect transistors (TFETs)[131, 132]. The TFETs are being considered leading contenders to outperform CMOS at low voltages[133, 134]. This is due to the fact that a subthreshold swing of less than 60 mV per decade can be attained in these devices at room temperature. A lower subthreshold swing reduces the supply voltage and enables a path to lower system power. Fig. 14(a) shows schematically an n-type TFET consisting of reverse biased p–i–n structure. The source is grounded in this case and positive voltages are applied to source and drain. Fig. 14(b) shows the corresponding band diagram of the TFET in OFF state. With zero gate voltage the tunneling distance indicated by the vertical dashed lines is large. When positive voltage is applied to the gate, bands in the channel move down and the tunneling distance shrinks as shown by the vertical dashed lines in Fig. 14(c). This allows band to band tunneling and the device is in ON state now. TFET has been studied extensively in the literature using different semiconductor materials and different device structures[135145]. More recently 2D materials such as graphene[146], black phosphorous[147] and transition metal dichalcogenides[148] have been used to fabricate TFETs. Roy et al.[149] reported a subthreshold swing of approximately 100 mV per decade at room temperature and ON/OFF ratio of 107 in the WSe2 and SnSe2 heterostructures. The interlayer band to band tunneling has been demonstrated in vertical MoS2/WSe2 heterostructures[150, 151]. One dimensional materials such as carbon nanotubes have been used to study the TFET[152, 153]. For further details about band to band tunnelling and TFETs the reader is referred to the cited references in this section and the references therein.






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Figure14.
(Color online) (a) Schematic diagram of n-type TFET. (b) Band diagram of the TFET in OFF state and (c) band diagram of the TFET in ON state.





4.
Concluding remarks




Different methods to make electrical contacts to single and clusters of nanostructures to explore the electrical properties are presented. The most popular method, however, is to fabricate electrical contacts to the nanostructures using a standard nano/micro fabrication process. However, C-AFM, nanoprobe with SEM and four-tip STM are also being used to measure electrical properties. A great deal of information can be obtained from the I–V characteristics of nanostructures. The temperature dependant I–V curves can be used to find the prevailing transport mechanism in the nanostructures. Various material parameters e.g. trap density, dielectric constant, number of charge carriers, mobility and density of localized states can be determined by carefully analysing the I–V curves.



相关话题/Carrier transport mechanisms