Title/Position
Professor

Degree
Ph.D., Carnegie Mellon University, 1994

aartig(@cs.princeton.edu) (609) 258-8017 220 Computer Science

Homepage
https://www.cs.princeton.edu/~aartig

Research

Interests: Formal verification, program analysis, logic decision procedures.
ACM Fellow, 2017.
Research Areas: Programming Languages / Compilers

Active Research Projects: Network Programming and Verification
SyLVer: Synthesis, Learning, and Verification

Short Bio

Aarti Gupta joined the Computer Science Department as a full professor in 2015. Before joining the department, she worked at NEC Labs America where she led a team in investigating new techniques for formal verification of software and hardware systems, contributing both to their foundations and to successful industrial deployment. The impact of this work was recognized through NEC Technology Commercialization Awards that she received in 2005, 2006 and 2012. Professor Gupta received her Ph.D. in computer science from Carnegie Mellon University in 1994 after earning a master’s degree in computer engineering from Rensselaer Polytechnic Institute and a bachelor’s in electrical engineering from the Indian Institute of Technology in New Delhi. She has served as an Associate Editor for Formal Methods in System Design (since 2005) and for the ACM Transactions on Design Automation of Electronic Systems (2008-2012). She has served as program chair and on the steering committees of the International Conference on Computer Aided Verification (CAV) and the International Conference on Formal Methods in Computer Aided Design (FMCAD).

Selected Publications

“Static Analysis for Concurrent Programs with Applications to Data Race Detection.” V. Kahlon, S. Sankaranarayanan, and A. Gupta. Software Tools for Technology Transfer (STTT) 15(4): 321-336, 2013.
“Symbolic Predictive Analysis for Concurrent Programs.” C. Wang, S. Kundu, R. Limaye, M. K. Ganai, and A. Gupta. Formal Aspects of Computing 23(6): 781-805 (2011).
“Efficient SAT-based Bounded Model Checking for Software Verification.” F. Ivan?i?, Z. Yang, M.K. Ganai, A. Gupta, and P. Ashar. Journal on Theoretical Computer Science (TCS), Volume 404(3), September 2008.
“SAT-based Scalable Formal Verification Solutions.” M. K. Ganai and A. Gupta. Springer, 2007. (book)
“Iterative Abstraction using SAT-based BMC with Proof Analysis.” A. Gupta, M. K. Ganai, Z. Yang, and P. Ashar. In Proceedings of the ACM/IEEE International Conference on Computer-Aided Design (ICCAD), November 2003.