王伶俐教授博士生导师
电话：**
邮箱：llwang@fudan.edu.cn
地址：复旦大学张江校区微电子楼241室
研究所：设计自动化研究所
研究方向：
FPGA结构与应用加速
集成电路设计与EDA算法
可重构计算
量子计算


教育背景：
英国爱丁堡Napier大学，电子工程，博士


学术经历：
2005年04月–现在复旦大学，副教授/教授
2001年02月-2005年04月原Altera欧洲研发中心，工程师/高级工程师
1998年04月-2001年02月英国爱丁堡Napier大学，博士研究生
1994年09月-1997年07月浙江大学，硕士研究生


荣誉称号：
浦江人才，2008


科研获奖：
获上海市技术发明三等奖，“复杂计算的高效安全可编程结构与可重构系统”，（第一完成人），2014。
获教育部科技进步二等奖，“适用于数据通路应用的可编程逻辑器件及其软件系统”，（第三完成人），2007。


教学获奖：
本科生选修课程“FPGA结构原理和应用”获复旦大学优秀全英语课程，2016年至今。


课程与教材：
本科生全英语选修课程“FPGA 结构原理和应用（Principle of FPGA Architecture and Its Applications）”, 课程代码：INFO130115.01, 开课学期：春季。学分：2。
研究生学位专业课程“系统级可编程芯片设计”， 课程代码：INFO630047，开课学期：秋季。学分：3。
研究生专业选修课程“可编程逻辑器件原理和CAD”， 课程代码：INFO820024，开课学期：春季。学分：3。
研究生专业选修课程“数字集成电路设计中的高级综合技术”， 课程代码：INFO830024，开课学期：秋季。学分：3。
中国工程院国际工程科技发展战略高端论坛，《高效能计算机体系结构的挑战、对策与前景展望》，高等教育出版社，2013年12月（担任编辑委员会委员）。
王伶俐，周学功，王颖，“系统级FPGA设计与应用”，清华大学出版社，2012年1月。
王伶俐，《集成电路工程领域发展报告》之专题9，“FPGA技术发展趋势”，浙江大学出版社，2011年9月。
王伶俐，杨萌，周学功，“深亚微米FPGA结构与CAD设计”， 电子工业出版社，2008年11月。


主要项目：
国家自然科学基金面上项目，“量子深度神经网络的设计与优化 ”（** ），2020.1-2023.12
国家蛋白质组研究中心,“面向FPGA加速的X!Tandem搜库引擎并行化加速”，2016.8–2018.7
上海金融期货信息技术有限公司,“会员端服务FPGA重构可行性研究”，2015.3–2015.8
国家自然科学基金国际(地区)合作与交流项目，第13届IEEE现场可编程技术国际会议(FPT2014)，2014.9-2014.12
国家863计划重点项目“新概念高效能计算机体系结构及系统研究开发”子课题，“面向图像识别的HRCA设计与实现”，2011.12-2013.9
国家自然科学基金重点项目“基于双逻辑的低功耗IP核设计基础理论与关键技术”子课题“基于双逻辑IP核的验证和测试平台”（**），子课题负责人，2012.1-2016.12
国家自然科学基金面上项目，“量子可编程逻辑阵列结构研究”（**），2012.1-2015.12
上海市科委白玉兰人才基金，“三维FPGA的热分析模型研究”，2009.5–2010.5
国家863计划重点项目“新概念高效能计算机体系结构及系统研究开发”子课题，“非冯体系结构研究”，2009.9-2010.1
国家863计划重点项目“新概念高效能计算机体系结构及系统研究开发”子课题，“纳米尺度SoC精化设计与验证技术研究”，2009.9-2010.5
“核高基”国家科技重大专项项目，“嵌入式可编程逻辑阵列IP核”， 软件子课题负责人，2009.1-2011.6
Canada-China Scientific and Technological Cooperation（中国国际人才交流协会和加拿大科学技术合作中心），Organization of International Workshop on Emerging Circuits and Systems,2009.8-2011.8
Sino-Swiss Science and Technology Cooperation 2008-2011(中瑞科技合作计划)，“Programmability Implementation Using Plasmonics Based on the MBQC Framework”，2009.8–2010.9
上海市“科技创新行动计划”集成电路设计专项，“国产自主知识产权FPGA的产业化应用和深入研发”， 负责FPGA软件系统的开发，2008.10-2010.9
上海市浦江人才项目，“抗辐射FPGA硬件电路与软件优化算法研究”，2008.9-2010.9
教育部留学回国人员科研启动基金，“量子计算电路的设计和优化”，2008.3
国家自然科学基金面上项目，“量子计算电路的设计和综合”，2007.1-2009.12
智锐电子系统设计(上海)有限公司，“面向可重构计算的FPGA软件算法开发”，2006.10–2007.3
美国Synopsys公司，“FPGA芯片设计和软件系统”，负责FPGA软件系统的开发，2005.2–2007.2
指导本科生申请的项目：
1)国家大学生创新训练计划二类项目：“FPGA时序收敛和码点调试工具”，2007.5-2008.5。
2)复旦大学本科生学术研究资助计划（FDUROP）曦源项目，“量子遗传算法在FPGA布局中的应用 ”，2009
3)复旦大学本科生学术研究资助计划（FDUROP）望道项目，“基于纳米级工艺FPGA的LUT尺度优化研究”，2010
4)复旦大学推免生暑期科研训练资助计划，“新型可编程互连结构探索”，2010
5)复旦大学“学生学术科技创新行动支持计划”自然科学B2类，“一款基于Qt的FPGA图形显示与调试工具”，2012
6)复旦大学推免生暑期科研训练资助计划，“基于量子模型的FPGA并行布局”，“SOPC的部分位流生成”，2013
7)复旦大学本科生学术研究资助计划（FDUROP）望道项目，“HRCA计算单元控制模块设计”，2013
8)复旦大学“学生学术科技创新行动支持计划” 自然科学B2类，“一款基于Qt的FPGA图形显示与调试工具”，2013
9)复旦大学本科生学术研究资助计划（FDUROP）望道项目，“HRCA计算单元控制模块设计”，2013
10)复旦大学“学生学术科技创新行动支持计划” 自然科学B2类，“基于图像的空间识别算法”，2014
11)复旦大学本科生学术研究资助计划（FDUROP）曦源项目，“面向高清视频的高速多目标检测与跟踪电路设计”，2014
12)复旦大学本科生学术研究资助计划（FDUROP）曦源项目，“面向金融时间序列的异常检测算法研究及其FPGA实现”，2016
13)复旦大学本科生学术研究资助计划（FDUROP）曦源项目，“高层次综合在机器学习算法领域的研究与实现”，2016
14)复旦大学本科生学术研究资助计划（FDUROP）曦源项目，“FPGA布局布线后的仿真验证”，2016
15)复旦大学本科生学术研究资助计划（FDUROP）曦源项目，“基于ORB算法的全景拼接技术研究及其FPGA实现”，2017
16)复旦大学本科生学术研究资助计划（FDUROP）曦源项目，“基于SoC FPGA的图像拼接APAP算法的硬件加速”，2017
17)复旦大学本科生学术研究资助计划（FDUROP）曦源项目，“量子神经网络结构研究”，2017
18)复旦大学本科生学术研究资助计划（FDUROP）望道项目，“基于开关信号代数系统的晶体管级电路设计优化与验证”，2019


主要论文-Publications：
1.Seyedramin Rasoulinezhad, Siddhartha, Hao Zhou, Lingli Wang, David Boland, Philip H.W. Leong, LUXOR: An FPGA Logic Cell Architecture for Efficient Compressor Tree Implementations, 28th ACM International Symposium on Field Programmable Gate Arrays (FPGA2020), 2020 (Accepted)
2.Yunhui Qiu, Jinyu Xie, Hankun Lv, Wenbo Yin, Wai-Shing Luk, Lingli Wang, Bowei Yu, Hua Chen, Xianjun Ge, Zhijian Liao, Xiaozhong Shi, FULL-KV: Flexible and Ultra-Low-Latency In-Memory Key-Value Store System Design on CPU-FPGA, IEEE Transactions on Parallel and Distributed Systems, TPDS-2019-06-0306 (IEEE Early Access Article), 2020(Download)
3.Xuegong Zhou, Lingli Wang, and Alan Mishchenko, Fast Exact NPN Classification by Co-Designing Canonical Form and Its Computation Algorithm, IEEE Transactions on Computers (IEEE Early Access Article), 2020(Download)
4.Mingjun Jiao, Yue Li, Pengbo Dang, Wei Cao and Lingli Wang, A High Performance FPGA-Based Accelerator Design for End-to-End Speaker Recognition System, IEEE International Conference on Field-Programmable Technology (FPT2019), Tianjin, pp.215-223, 2019 (Download)
5.JinyuXie, YunhuiQiu, Wenbo Yin and Lingli Wang, High-Throughput and Low-Latency Distributed Management Proxy for Key-Value Store Over 100Gbps Ethernet on FPGA, IEEE International Conference on Field-Programmable Technology (FPT2019), Tianjin, pp.224-230, 2019 (Download)
6.Di Wu, Wei Cao and LingliWang, SpWMM: A High-Performance Sparse-Winograd Matrix-Matrix Multiplication Accelerator for CNNs, IEEE International Conference on Field-Programmable Technology (FPT2019), Tianjin, pp.255-258, 2019 (Download)
7.Moucheng Yang, Tao Chen, Xuegong Zhou, Liang Zhao, Yunping Zhu and LingliWang, A Complete CPU-FPGA Architecture for Protein Identification with Tandem Mass Spectrometry, IEEE International Conference on Field-Programmable Technology (FPT2019), Tianjin, pp.295-298, 2019(Download)
8.Seyedramin Rasoulinezhad, Sean Fox, Hao Zhou, Lingli Wang, David Boland and Philip H. W. Leong, MajorityNets: BNNs Utilising Approximate Popcount for Improved Efficiency, IEEE International Conference on Field-Programmable Technology (FPT2019), Tianjin, pp.339-342, 2019(Download)
9.Xuegong Zhou, Lingli Wang, Alan Mishchenko, Fast Adjustable NPN Classification Using Generalized Symmetries, ACM Trans. on Reconfig. Tech. & Sys. Vol.12, No.2, pp.7:1-16, 2019(Download)
10.S. Rasoulinezhad, Hao Zhou, Lingli Wang and P. Leong, PIR-DSP: An FPGA DSP-block Architecture for Multi-Precision Deep Neural Networks, 27th IEEE International Symposium On Field-Programmable Custom Computing Machines(FCCM 2019), San Diego, CA, pp.35-44, 2019 (Download)
11.Su Zheng, Jialin Chen, Lingli Wang, Targeted Black-Box Adversarial Attack Method for Image Classification Models, International Joint Conference on Neural Networks (IJCNN'2019), pp.1-8, 2019 (Download)
12.Yuchen Ren, Jinyu Xie, Yunhui Qiu, Hankun Lv, Wenbo Yin, Lingli Wang, Bowei Yu, Hua Chen, Xianjun He, Zhijian Liao, Xiaozhong Shi, A Low-Latency Multi-Version Key-Value Store Using B-Tree on an FPGA-CPU Platform, 29th International Conference on Field Programmable Logic and Applications (FPL2019), pp.321-325, 2019(Download)
13.Xibo Sun, Hao Zhou, Lingli Wang, Bent Routing Pattern for FPGA, 29th International Conference on Field Programmable Logic and Applications (FPL2019), pp.9-16, 2019(Download)
14.Cheng Luo, Wei Cao, Lingli Wang, and Philip Leong, RNA: An Accurate Residual Network Accelerator for Quantized and Reconstructed Deep Neural Networks, IEICE Trans. Fundamentals (accepted), 2019
15.陈佳临，王伶俐，“量子并行神经网络”，计算机学报，Vol.42, No.6, pp.1205-1217, 2019(Download)

16.Junqi Yuan, Jialing Chen, Lingli Wang, Xuegong Zhou, Yinshui Xia, Jianping Hu, ARBSA: Adaptive Range-Based Simulated Annealing for FPGA Placement, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,Vol.38, No.12, pp.2330-2342, 2019 (Download)

17.Liang Xie, Xitian Fan, Wei Cao, and Lingli Wang, High Throughput CNN Accelerator Design Based on FPGA, IEEE International Conference on Field-Programmable Technology (FPT2018), pp.145-152, 2018 (Download)
18.Yunhui Qiu, Hankun Lv, Jinyu Xie, Wenbo Yin and Lingli Wang, Ultra-Low-Latency and Flexible In-Memory Key-Value Store System Design on CPU-FPGA, IEEE International Conference on Field-Programmable Technology (FPT2018), pp.277-280, 2018 (Download)
19.Xuegong Zhou, Lingli Wang, Peiyi Zhao, Alan Mishchenko, Fast Adjustable NPN Classification Using Generalized Symmetries (accepted, 最佳论文提名), International Conference on Field-Programmable Logic and Applications (FPL2018), Dublin, pp.1-7, 2018(Download)
20.Cheng Luo, Yuhua Wang, Wei Cao, Philip Leong and Lingli Wang, RNA: An Accurate Residual Network Accelerator for Quantized and Reconstructed Deep Neural Networks, (accepted), International Conference on Field-Programmable Logic and Applications (FPL2018), Dublin,pp.60-63, 2018(Download)
21.Di Wu, Jin Chen, Lingli Wang and Wei Cao, A Novel Low-Communication Energy-Efficient Reconfigurable CNN Acceleration Architecture for Embedded Systems, (accepted), International Conference on Field-Programmable Logic and Applications (FPL2018), Dublin,pp.64-67,2018(Download)
22.Xitian Fan, Di Wu, Wei Cao, Wayne Luk, Lingli Wang, Stream Processing Dual-Track CGRA for Object Inference, IEEE Transactions on Very Large Scale Integration Systems, Vol.26, No.6, pp.1098-1111, 2018(Download)
23.Li Ding, Wenbo Yin and Lingli Wang, Ultra-Low Latency and High Throughput Key-Value Store Systems Over Ethernet, International Symposium on Circuits and Systems (ISCAS2018), Florence, Italy, 2018(Download)
24.Junqi Yuan; Lingli Wang; Xuegong Zhou; Yinshui Xia; Jianping Hu, RBSA:Range-based Simulated Annealing for FPGA Placement (最佳论文提名), IEEE International Conference on Field-Programmable Technology (FPT2017), pp.1-8, Melbone, Australia, 2017(Download)
25.Moucheng Yang, Jifang Jin, Zhehao Li, Xuegong Zhou, Shaojun Wang and Lingli Wang, A Scalable Hybrid Architecture for High Performance Data-Parallel Applications, International Conference on Field-Programmable Technology (FPT 2017), pp. 191-194, Melbone, 2017(Download)
26.Jialin Chen, Lingli Wang and Edoardo Charbon, A quantum-implementable neural network model, Quantum Information Processing, 16: 245, 2017(Download)
27.Li Jiao, Cheng Luo, Wei Cao, Xuegong Zhou, Lingli Wang, Accelerating Low Bit-Width Convolutional Neural Networks with Embedded FPGA, International Conference on Field-Programmable Logic and Applications (FPL2017), Belgium, 2017(Download)
28.Jin Qiu, Ping Kang, Li Ding, Yipeng Yuan, Wenbo Yin, Lingli Wang, FPGA Acceleration of the Scoring Process of X!TANDEM for Protein Identification, International Conference on Field-Programmable Logic and Applications (FPL2017), Belgium, 2017(Download)
29.Jian Yan, Junqi Yuan, Philip H. W. Leong, Wayne Luk, and Lingli Wang, Lossless Compression Decoders for Bitstreams and Software Binaries Based on High-Level Synthesis, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 25, No.10, pp. 2842-2855, 2017(Download)
30.Li Ding, Kang Ping, Wenbo Yin and LingLi Wang, Hardware TCP Offload Engine based on 10-Gbps Ethernet for Low-Latency Network Communication, IEEE International Conference on Field-Programmable Technology (FPT2016), pp.265- 268, 2016(Download)
31.Qi Zhan, Min Gao, Li Jiao, Shiwen Wang, Xitian Fan, Wei Cao, Xuegong Zhou and Lingli Wang, High Performance Deformable Part Model Accelerator Based on FPGA, IEEE International Conference on Field-Programmable Technology (FPT2016), pp.241- 244, 2016(Download)
32.Zhehao Li, Jifang Jin, Ji Yang, Jiahua Lu, Lingli Wang, A Moving Object Extraction and Classification System based on Zynq and IBM SuperVessel, IEEE International Conference on Field-Programmable Technology (FPT2016), pp.303- 306, 2016(Download)
33.Wei Liang, Wenbo Yin, Ping Kang, Lingli Wang, Memory Efficient and High Performance Key-value Store on FPGA Using Cuckoo Hashing, Field-Programmable Logic and Applications (FPL2016), Lausanne, pp.379-382, 2016(Download)
34.Hao Zhou, Xinyu Niu, Junqi Yuan, Lingli Wang, Wayne Luk, Connect On the Fly: Enhancing and Prototyping of Cycle-Reconfigurable Modules, Field-Programmable Logic and Applications (FPL2016), Lausanne, pp.233-240, 2016(Download)
35.Xitian Fan, Huimin Li, Wei Cao, Lingli Wang, DT-CGRA: Dual-Track Coarse-Grained Reconfigurable Architecture for Stream Applications, Field-Programmable Logic and Applications (FPL2016), Lausanne, pp.78-86,2016(Download)
36.Huimin Li, Xitian Fan, Li Jiao, Wei Cao, Xuegong Zhou, Lingli Wang, A High Performance FPGA-based Accelerator for Large-Scale Convolutional Neural Networks, Field-Programmable Logic and Applications (FPL2016), Lausanne, pp. 69-77, 2016(Download)
37.Jifang Jin, Jian Yan, Xuegong Zhou and Lingli Wang, An Adaptive Cross-Layer Fault Recovery Solutionfor Reconfigurable SoCs, IEEE International Conference on Field-Programmable Technology (FPT2015), pp. 188-191, Queenstown, 2015(Download)
38.Jian Yan, Jifang Jin, Ying Wang, Xuegong Zhou, Philip Leongand Lingli Wang, UniStream: A Unified Stream Architecture Combining Configuration and Data Processing, Field-Programmable Logic and Applications (FPL2015), pp.1-4, London, 2015(Download)
39.Jian Yan, Junqi Yuan, Ying Wang, Philip Leong and Lingli Wang, Design Space Exploration for FPGA-based Hybrid Multicore Architecture, IEEE International Conference on Field-Programmable Technology (FPT2014), pp.280-281, 2014(Download)
40.Jiasen Huang, Junyan Ren, Wenbo Yin and Lingli Wang, No Zero Padded Sparse Matrix-Vector Multiplication on FPGAs, IEEE International Conference on Field-Programmable Technology (FPT2014), pp.290-291, 2014(Download)
41.Hu, Guangxi; Xiang, Ping; Ding, Zhihao; Liu, Ran; Wang, Lingli; Tang, Ting-Ao, Analytical Models for Electric Potential, Threshold Voltage, and Subthreshold Swing of Junctionless Surrounding-Gate Transistors, IEEE Transactions on Electron Devices, Vol.61, No.3, pp.688-695, 2014(Download)
42.Chaofan Yu, Lingli Wang, Chun Zhang, Yu Hu, Lei He, Fast Filter-Based Boolean Matchers, IEEE Embedded Systems Letters, Vol. 5, No. 4, pp. 65-68, December 2013(Download)
43.Xitian Fan, Chenlu Wu, Wei Cao, Xuegong Zhou, Shengye Wang and Lingli Wang, Implementation of High Performance Hardware Architecture of OpenSURF Algorithm on FPGA, IEEE International Conference on Field-Programmable Technology (FPT2013), pp.152-159, 2013(Download)
44.Zheng Huang, Lingli Wang, Yakov Nasikovskiy and Alan Mishchenko, Fast Boolean Matching Based on NPN Classification, IEEE International Conference on Field-Programmable Technology (FPT2013), pp. 310-313, 2013(Download)
45.Jialin Chen, Lingli Wang and Bin Wang, Quantum FPGA Architecture Design, IEEE International Conference on Field-Programmable Technology (FPT2013), pp. 354-357, 2013(Download)
46.Shengye Wang, Chen Liang, Xuegong Zhou, Wei Cao, Chenlu Wu, Xitian Fan and Lingli Wang, A Hardware Implementation of Bag of Words and Simhash for Image Recognition, IEEE International Conference on Field-Programmable Technology (FPT2013), pp.418-421, 2013(Download)
47.Chen Liang, Chenlu Wu, Xuegong Zhou, Wei Cao, Shengye Wang and Lingli Wang, An FPGA-Cluster-Accelerated Match Engine for Content-based Image Retrieval, IEEE International Conference on Field-Programmable Technology(FPT2013), pp.422-425, 2013(Download)
48.Jialin Chen, Lingli Wang, Edoardo Charbon, and Bin Wang, Programmable Architecture for Quantum Computing, Physical Review A (88), 022311, 2013(Download)
49.Ying Wang, Xuegong Zhou, Lingli Wang, Jian Yan, Wayne Luk, Chenglian Peng and Jiarong Tong, SPREAD: A Streaming-based Partially Reconfigurable Architecture and Programming Model, IEEE Transactions on Very Large Scale Integration Systems，Vol.21, No.12, pp. 2179-2192, 2013(Download)
50.Guangxi Hu, Shuyan Hu, Ran Liu, Lingli Wang, Xing Zhou, Ting-Ao Tang, Quasi-Ballistic Transport Model for Graphene Field-Effect Transistor, IEEE Transactions on Electron Devices, Vol. 60, No. 7, p 2410-2414, 2013(Download)
51.Zheng Huang, Lingli Wang, Yakov Nasikovskiy, Alan Mishchenko, Fast Boolean Matching for Small Practical Functions, Proc. International Workshop on Logic Synthesis (IWLS), pp.30-36, 2013(Download)
52.Wenlong Yang, Lingli Wang, and Alan Mishchenko, Lazy Man’s Logic Synthesis, International Conference on Computer-Aided Design (ICCAD), pp.597-604, 2012(Download)
53.W. Yang, L. Wang, and A. Mishchenko, "LMS: A new logic synthesis method based on pre-computed library", Proc. International Workshop on Logic Synthesis (IWLS), pp. 1-9, 2012(Download)
54.Ying Wang, Jian Yan, Xuegong Zhou, Lingli Wang, Wayne Luk, Chenglian Peng, Jiarong Tong, A Partially Reconfigurable Architecture Supporting Hardware Threads (最佳论文提名), IEEE International Conference on Field-Programmable Technology (FPT2012), pp.269-276, 2012(Download)
55.陈志辉, 章淳, 王颖, 王伶俐, 一种FPGA抗辐射工艺映射方法研究, 电子学报, Vol.39, No.11, pp.2507-2512, 2011(Download)
56.Kanwen Wang, Jialin Chen, Wei Cao, Ying Wang, Lingli Wang, Jiarong Tong, A Reconfigurable Multi-Transform VLSI Architecture Supporting Video Codec Design，IEEE Transactions on Circuits and Systems—II: Express Briefs, Vol. 58, No. 7, pp.432-436, 2011(Download)
57.Kejie Ma, Lingli Wang, Xuegong Zhou, Sheldon X.-D.Tan, Jiarong Tong, General Switch Box Modeling and Optimization for FPGA Routing Architectures, pp.320-323, International Conference on Field-Programmable Technology(FPT2010), 2010(Download)
58.Chun Zhang, Lerong Cheng, Lingli Wang, Jiarong Tong, FPGA power and timing optimization: architecture, process, and CAD, 2010 International Conference on Computational Problem-Solving (ICCP), Invited Talk，pp.350 - 354, 2010(Download)
59.Chun Zhang, Yu Hu, Lingli Wang, Lei He, and Jiarong Tong, Accelerating Boolean Matching Using Bloom Filter，IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol.E93-A, No.10,pp.1775-1781, 2010(Download)
60.C. Zhang, Y. Hu, L. Wang, J. Tong and L. He, Engineering a Scalable Boolean Matching Based on EDA SaaS 2.0, The International Conference on Computer-Aided Design (ICCAD), San Jose, CA., pp. 750-755, 2010(Download)
61.C. Zhang, Y. Hu, L. Wang, J. Tong and L. He, Building A Faster Boolean Matcher Using Bloom Filter，Proceedings of 18th ACM International Symposium on Field Programmable Gate Arrays 2010, pp.185-188, Feb. 2010(Download)
62.HU Guang-Xi, WANG Lingli, LIU Ran, TANG Ting-Ao, Quantum-Mechanical Study on Surrounding-Gate Metal-Oxide-Semiconductor Field-Effect Transistors, Commun. Theor. Phys., Chinese Physical Society, pp. 763-767, Vol. 54, No. 4, 2010(Download)
63.龚爱慧，梁绍池，陈志辉，王伶俐，童家榕, CSPack：采用CSP图匹配的新型装箱算法, 计算机辅助设计与图形学学报, Vol.22, No.11, pp.1998-2003, 2010(Download)
64.汪鹏君，李辉，吴文晋，王伶俐, 张小颖，戴静，量子遗传算法在多输出Reed-Muller逻辑电路最佳极性搜索中的应用，电子学报，Vol.38, No.5, pp.1058-1063, 2010(Download)
65.Jia-Lin Chen, Edoardo Charbon, Lingli Wang, Wen-Qing Zhao, Quantum Gate Array Architecture Design Using Photons, International Conference on Quantum Foundation and Technology(ICQFT’09), 2009(Download)
66.Guang-Xi Hu, Ran Liu, Ting-Ao Tang, and Ling-Li Wang, Analytic Investigation on Threshold Voltage of Fully-depleted Surrounding-Gate Metal-Oxide-Semiconductor Field-Effect-Transistors, Journal of the Korean Physical Society，Vol. 52, No. 6, pp.1909–1912, 2008(Download)
67.谈珺, 申秋实，王伶俐，童家榕, FPGA通用开关盒层次化建模与优化, 电子与信息学报, 第30卷，第5期, pp.1239-1242, 2008(Download)
68.M. Yang, L. Wang, J.R. Tong, A.E.A. Almaini, Techniques for Dual Forms of Reed-Muller Expansion Conversion， Integration, the VLSI Journal，Vol. 41, No. 1, pp.113-122, 2008(Download)
69.胡云，王伶俐，唐璞山，童家榕, 基于概率增益的电路划分算法，电子与信息学报，Vol.29，No.11, pp.2762-2766, 2007(Download)
70.Guang-Xi Hu, Ran Liu, Ting-Ao Tang, Shi-Jin Ding, and Ling-Li Wang, Theory of Short-Channel Surrounding-Gate Metal-Oxide-Semiconductor Field-Effect-Transistors, Japanese Journal of Applied Physics, Vol. 46, No. 4A, pp. 1437-1440，2007(Download)
71.胡云，王伶俐，唐璞山，童家榕, 基于布通率的FPGA装箱算法，计算机辅助设计与图形学学报，Vol.19, No.1, pp.108-113, 2007(Download)
72.L. Wang, and A. E. A. Almaini, Multilevel Logic Simplification Based on Containment Recursive Paradigm, IEE Proceedings Computers and Digital Techniques, Vol.150, No.4, 218-226, 2003(Download)
73.L. Wang and A. E. A. Almaini, Exact Minimisation of Large Multiple Output FPRM Functions, IEE Proceedings Computers and Digital Techniques, Vol.149, No.5, 203-212, 2002(Download)
74.L. Wang and A. E. A. Almaini, Optimisation of Reed-Muller PLAImplementations, IEE Proceedings Circuits, Devices and Systems, Vol.149, No.2, 119-128, 2002(Download)
75.L. Wang and A. E. A. Almaini, Multilevel Logic Minimization Using Functional Don't Cares, 14th International Conference on VLSI Design, IEEE Computer Society, Bangalore, India, 417-424, 2001(Download)
76.X. Wu, M. Pedram, and L. Wang, Multi-Code State Assignment for Low Power Sequential Circuit Design, IEE Proceedings Circuits, Devices and Systems, Vol.147, No.5, 271-275, 2000(Download)
77.L. Wang, A. E. A. Almaini, Fast Conversion Algorithm for Very Large Boolean Functions, IEE Electronics Letters, Vol.36, No.16, 1370-1371, 2000(Download)
78.王伶俐, L, Song, G. Wu, Xiexiong, Chen, 基于双向电流型CMOS电路的谱综合, 电子科学学刊, Vol.22, No.2, 310-315, 2000(Download)
79.L. Wang, A. E. A. Almaini, and A. Bystrov, Efficient Polarity Conversion for Large Boolean Functions, IEE Proceedings Computers and Digital Techniques, Vol.146, No.4, 197-204, 1999(Download)
80.L. Wang, X. Chen, and A. E. A. Almaini, Algebraic Properties of Multiple-Valued Modulo Systems and Their Applications to Current-Mode CMOS Circuits, IEE Proceedings Computers and Digital Techniques, Vol.145, No.5, 364-368, 1998(Download)
81.L. Wang, X. Chen, and A. E. A. Almaini, Modulo Correlativity and its Application in a Multiple Valued Logic System, International J. Electronics, Vol.85, No.5, 561-570, 1998(Download)
82.王伶俐, Xiexiong Chen, and Xunwei Wu, 模为合数时多值模代数的模减与模除运算, 电子学报, Vol.26, No.5, 17-20, 1998(Download)
83.王伶俐, Xinmin Xu, Xiexiong Chen, 基于模运算模为合数的多值逻辑函数的展开, 电子科学学刊, Vol.20, No.1, 120-124, 1998(Download)
84.范雅俊，王伶俐，陈偕雄，基于多值模相关性的电流型CMOS电路设计，电路与系统学报，Vol.3，No.2, pp.43-49, 1998(Download)
85.王伶俐，陈偕雄，不完全确定序列机状态化简，电路与系统学报，Vol.1，No.3, pp.72-76, 1996(Download)


专利与软件著作权：
名称:多通道红外遥控开关，类别:实用新型
专利号:ZL 93 2 13026.7，授权日期:1993年5月
名称:掩模可编程逻辑器件编程的方法及如此编程的器件，类别:发明专利
专利号:9.7，授权日期:2005年1月
名称:Method for programming a mask-programmable logic device and device so programmed, 类别:美国专利
专利号:**，授权日期:2007年10月
名称:一种现场可编程逻辑阵列的通用互连盒结构及建模方法，类别:发明专利
专利号: ZL 2.X，授权日期:2012年10月
名称:一种可编程逻辑器件互连资源的故障测试方法，类别:发明专利
专利号:ZL 5.1，授权日期:2012年10月
名称:一种现场可编程门阵列的抗辐射性能快速模拟方法，类别:发明专利
专利号:ZL 8.8，授权日期:2012年11月
名称:基于边界扫描的可编程逻辑器件自动测试系统与方法，类别:发明专利
专利号:ZL 5.2，授权日期:2013年2月
名称:FPGA/SOPC后端编译软件[简称:FDE软件] V1.0，类别:计算机软件著作权
登记号:2013SR067117，批准日期:2013年7月
名称:支持用户定制的可编程逻辑器件版图快速生成方法，类别:发明专利
专利号:6.1，授权日期:2015年7月
名称:一种用于FPGA电路位流仿真的方法，类别:发明专利
专利号:0.2，授权日期:2017年7月
名称:一种基于LBP特征的人脸识别硬件架构，类别:发明专利
专利号:7.6，授权日期:2018年4月


学术活动：
“智能时代的计算结构探讨”, 摩尔精英网络直播：前沿技术分享，2017(Download)
2015年至今担任International Conference on Field Programmable Technology国际会议steering committee member。2017年至今担任DVCon China设计与验证国际会议steering committee member。
“Customizable FPGA Computing Platform and Reliability Improvement”, China Semiconductor Technology International Conference 2014 (CSTIC 2014), Invited Talk, 2014(Download)
“Hardware Acceleration and Reliability Improvement for FPGA-Based Reconfigurable Computing”, The 4th International Workshop on Advanced Technologies in Programmable System on Chip ( ATPSOC 2014 ), Keynote Speech, 2014(Download)
2014年担任第13届现场可编程技术国际会议(International Conference on Field Programmable Technology, ICFPT2014) General Chair (www.icfpt2014.org)
IEEE Council on EDA (Electronic Design Automation) Shanghai Chapter Chair, 2012-2017
Chun Zhang, Lerong Cheng, Lingli Wang, Jiarong Tong, FPGA power and timing optimization: architecture, process, and CAD, 2010 International Conference on Computational Problem-Solving (ICCP), Invited Talk, 2010(Download)
指导学生参加"Altera杯"中国第五届研究生EDA电子设计竞赛，获团体金奖，清华大学，2005
国际会议和杂志论文审稿：14th International Conference on VLSI Design, VLSID’2001; International Conference on Field Programmable Technology, ICFPT; Asia and South Pacific Design Automation Conference, ASPDAC; International Conference on Application-specific Systems, Architectures and Processors, ASAP; International Conference on Theory and Applications of Satisfiability Testing, SAT’2016; IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems，IEEE Transactions on Very Large Scale Integration Systems, IEEE Transactions on Circuits and Systems, ACM Transactions on Embedded Computing Systems, Journal of Systems Architecture，Optics and Laser Technology，中国科学，计算机辅助设计与图形学学报，电子学报，电子与信息学报，半导体学报, 软件学报，雷达学报，电路与系统学报等


English Version:


Education & Training

10.2004 Project Management, Cadence International, UK
12.2001 Professional Certificate: C and C++ Programming Certified Professional
Learning Tree International, UK
Professional Certificate: C++ Object-Oriented Programming Certified Professional Learning Tree International, UK

12.2001 Learning Tree International training course: “C++ Advanced Programming and design” , UK
11.2001 Doulos Limited training course: “Comprehensive VHDL”, UK
4.1998 - 2.2001 School of Engineering, Napier University, Edinburgh, UK
10.1998 Rutherford Appleton Laboratory, “Cadence/AMS Mixed-Signal Design Flow Course”, Oxford, UK (Cadence version 97A/4.4.1, AMS 0.8μBiCMOS version 3.0.1).

9.1994 - 7.1997 Department of Electronic Engineering, Zhejiang University, P. R. China

Work Experience
5.2010 – now Full Professor，School of Microelectronics, Fudan University, Shanghai, China
7.2010 – 8.2010 Sino-Swiss Science and Technology Cooperation, EPFL and TUDelft
4.2005 – 4.2010 Associate Professor，School of Microelectronics, Fudan University, Shanghai, China
11.2008 – 12.2008 Visiting Faculty, Cadence Research Lab at Berkeley, USA
2.2001 – 4.2005 Software engineer (Senior Engineer from 2003), Altera European Technology Centre, Holmers Farm Way, High Wycombe, Buckinghamshire, UK
2.1996 - 5.1997 Lectured two courses: “Discrete Mathematics”, and “C Language Programming”, Department of Electronic Engineering, Zhejiang University, China.
8.1990 - 4.1998 Foreign Language Department, Zhejiang University, China


Publications：See above