教授 硕士生导师
    招生学科专业：
    电子信息工程学院 -- 电子科学与技术 --【招收硕士研究生】
    电子信息工程学院 -- 信息与通信工程(集成电路设计) --【招收硕士研究生】
    电子信息工程学院 -- 电子信息 --【招收硕士研究生】
    性别：男
    毕业院校：Queen's University Belfast
    学历：博士研究生毕业
    学位：工学博士学位
    所在单位：电子信息工程学院
    办公地点：College of Electronic and Information Engineering (CEIE)
    Nanjing University of Aeronautics and Astronautics (NUAA)
    Room 414, CEIE, Jiangning Campus, 29 Jiangjun Avenue
    Nanjing, Jiangsu, China, 211106
    电子邮箱：liuweiqiang@nuaa.edu.cn

教育经历

2002.9 -- 2006.6
南京航空航天大学       信息工程       大学本科毕业       工学学士学位
研究方向

Approximate Computing Circuits and Systems
Computer Arithmetic
Hardware Security
Cryptographic Hardware
VLSI for Digital Signal Processing and Communications




Books and Book Chapters:

[BC2] Weiqiang Liu, Chongyan Gu, Gang Qu, and Maire O'Neill, Book Chapter: Approximate Computing and Its Application to Hardware Security, Cetin Koc (Editor): Cyber-Physical Systems Security, pp. 43-67, Springer-Verlag, Dec. 2018.

[BC1] Weiqiang Liu, Saket Srivastava, Maire O'Neill and Earl E. Swartzlander, Jr., Book Chapter: Security Issues in QCA Circuits: Power Analysis Attacks, N. G. Anderson and S. Bhanja (Eds.): Field-Coupled Nanocomputing: Paradigm, Progress and Perspectives, LNCS 8280, pp. 194-222, Springer-Verlag, Jul. 2014.

[B1] Weiqiang Liu, Earl E. Swartzlander, Jr., and Maire O'Neill, Design of Semiconductor QCA Systems, Norwood, MA: Artech House, Sep. 2013.


International Journals:

[J59] Zhufei Chu, Z. Li, Yinshui Xia, Lunyao Wang and Weiqiang Liu, BCD Adder Designs for Quantum-dot Cellular Automata Based on three-input XOR and Majority Gates, IEEE Transactions on Circuits and Systems II: Brief Express, DOI: 10.1109/TCSII.2020.3047393.

[J58] Weiqiang Liu, Fabrizio Lombardi, Michael Schutle, Approximate Computing: from Circuits to Applications, Proceeding of the IEEE, DOI:10.1109/JPROC.2020.3033361.

[J57] Jie Sun, Xin Ding, Chenggang Yan, Weiqiang Liu, Background Calibration for Bit Weights in Pipelined ADCs Using Adaptive Dither Windows, IEEE Transactions on Circuits and Systems II: Brief Express, DOI: 10.1109/TCSII.2020.3038919.

[J56] Chongyan Gu, Chip-Hong Chang, Weiqiang Liu, Shichao Yu, Neil Hanley, and Maire O'Neill, A Modeling Attack Resistant Deception Technique for Secure and Lightweight PUF-based Authentication, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, DOI: 10.1109/TCAD.2020.3036807.

[J55] Tian Yuan, Weiqiang Liu, Jie Han, and Fabrizio Lombardi, High Performance CNN Accelerators based on Hardware and Algorithm Co-Optimization, IEEE Transactions on Circuits and Systems I: Regular Papers, DOI: 10.1109/TCSI.2020.3030663. (Highlight Paper of IEEE TCAS-I 2021 January Issue)

[J54] Weiqiang Liu, Chongyan Gu, Gang Qu, Maire O'Neill, Paolo Montuschi and Fabrizio Lombardi, Security in Approximate Computing and Approximate Computing for Security: Challenges and Opportunities, Proceedings of the IEEE, DOI: 10.1109/JPROC.2020.3030121.

[J53] Mingfu Xue, Can He, Jian Wang and Weiqiang Liu, One-to-N & N-to-One: Two Advanced Backdoor Attacks against Deep Learning Models, IEEE Transactions on Dependable and Secure Computing, DOI: 10.1109/TDSC.2020.3028448.

[J52] Chongyan Gu, Neil Hanley, Weiqiang Liu, Jack Miskelly and Maire O'Neill, A Comprehensive Analysis for Large Scale of Single Slice Based Physical Unclonable Functions on 28nm Xilinx FPGAs, Journal of Cryptographic Engineering, Accept.

[J51] Yuying Zhu, Weiqiang Liu, Tian Cao, Peipei Yin, Jie Han and Fabrizio Lombardi Design and Analysis of Optimal Approximate Booth Multipliers for Error-Tolerant Applications, IET Circuits, Devices & Systems, Accept.

[J50] Weiqiang Liu, Tao Xu, Jing Li, Chenghua Wang, Paolo Montuschi, and Fabrizio Lombardi, Design of Approximate Hybrid Dividers based on Array and Logarithmic Dividers, IEEE Transactions on Emerging Topics in Computing, DOI:10.1109/TETC.2020.3022290.

[J49] Haroon Waris, Chenghua Wang, Weiqiang Liu, Jie Han and Fabrizio Lombardi, Hybrid Partial Product-based High-Performance Approximate Recursive Multipliers, IEEE Transactions on Emerging Topics in Computing, DOI: 10.1109/TETC.2020.3013977.

[J48] Haroon Waris, Chenghua Wang, Weiqiang Liu and Fabrizio Lombardi, Design of Approximate Systolic Array Architecture for Matrix Multiplication, Journal of Signal Processing Systems, DOI: 10.1007/s11265-020-01582-7.

[J47] Peipei Yin, Chenghua Wang, Weiqiang Liu, Haroon Waris, Yinhe Han, Fabrizio Lombardi, Design and Analysis of Dynamic Range Approximate Logarithmic Multipliers (DR-ALMs) for Machine Learning Applications, IEEE Transactions on Sustainable Computing, DOI: 10.1109/TSUSC.2020.3004980.

[J46] Dur-e-Shahwar Kundi, Ayesha Khalid, Chenghua Wang, Arshad Aziz, Maire O'Neill and Weiqiang Liu, AE$HA-3: FPGA based Resource-shared Architecture of AES Enc/Dec with SHA-3, IEEE Transactions on Circuits and Systems-I: Regular Papers, DOI:10.1109/TCSI.2020.2997916.

[J45] Ke Chen, Weiqiang Liu, Jie Han and Fabrizio Lombardi, Profile-based Output Error Compensation for Approximate Arithmetic Circuits, IEEE Transactions on Circuits and Systems-I: Regular Papers, DOI: 10.1109/TCSI.2020.2996567.

[J44] Jie Sun, Xin Li, Chenggang Yan, Weiqiang Liu, Dither-based calibration of bit weights in pipelined-SAR ADCs with fast convergence speed using partially split structure, IET Electronic Letters, Accept.

[J43] Zhe Liu, Kim-Kwang Raymond Choo, Weiqiang Liu, and Muhammad K. Khan, Introduction to the Special Issue on Cyber Security Threats and Defense Advance, IEEE Transactions on Emerging Topics in Computing, vol. 8, no. 2, pp. 264-266, 2020.

[J42] Yijun Cui, Qingqing Ma, Chongyan Gu, Yue Fang, Chenghua Wang, Maire O'Neill and Weiqiang Liu, Lightweight Modeling Attacks Resistant Multiplexer Based Multi-PUF (MM-PUF) Design on FPGA, Electronics, vol. 9, no. 5, 815, 2020.

[J41] Mingfu Xue, Chongyan Gu, Weiqiang Liu, Shichao Yu, and Maire O'Neill, Designing Practical Hardware Trojans: A Survey from the Attacker’s Perspective, IET Computer Design Technique, Accept.

[J40] Yuqing Zhang, Chenghua Wang, Dur-E-Shahwar Hundi, Ayesha Khalid, Maire O'Neill, and Weiqiang Liu, An Efficient and Parallel R-LWE Cryptoprocessor, IEEE Transactions on Circuits and Systems II: Brief Express, DOI: 10.1109/TCSII.2020.2980387.

[J39] Haroon Waris, Chenghua Wang, Weiqiang Liu, Hybrid Low Radix Encoding based Approximate Booth Multipliers, IEEE Transactions on Circuits and Systems II: Brief Express, DOI: 10.1109/TCSII.2020.2975094.

[J38] Jie Sun, Xin Li, Chenggang Yan, Weiqiang Liu, Attenuation-Factor Error Shaping Technique for Split CDAC in SAR ADCs, IET Electronics Letter, Accept.

[J37] Yunhao Xu, Yingjie Lao, Weiqiang Liu, Xiaohu You, and Chuan Zhang, Statistical Analysis of Typical and Duty Cycle Based Strong Physical Unclonable Functions, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, DOI: 10.1109/TCAD.2020.2969645.

[J36] Jie Sun, Minglei Zhang, Lei Qiu and Weiqiang Liu, Background Calibration of Bit-weights in Pipelined-SAR ADCs Using Dual Comparators, IEEE Transactions on Very Large Scale Integrated (VLSI) System, DOI: 10.1109/TVLSI.2019.2961149.

[J35] Weiqiang Liu, Ziying Ni, Jian Ni, Ciara Rafferty, and Maire O'Neill, High Performance Modular Multiplication for SIDH, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, DOI: 10.1109/TCAD.2019.2960330.

[J34] Shanshan Liu, Ke Chen, Pedro Reviriego, Weiqiang Liu, Ahmed Louri and Fabrizio Lombardi, Reduced Precision Redundancy for Error Tolerance and Reliable Processing of Data, IEEE Transactions on Emerging Topics in Computing, DOI: 10.1109/TETC.2019.2947617

[J33] Chongyan Gu, Weiqiang Liu, Yijun Cui, Neil Hanley, Maire O'Neill, and Fabrizio Lombardi, A Flip-Flop Based Arbiter Physical Unclonable Function (APUF) Design with High Entropy and Uniqueness for FPGA Implementation, IEEE Transactions on Emerging Topics in Computing, DOI: 10.1109/TETC.2019.2935465.

[J32] Weiqiang Liu, Tingting Zhang, Emma McLarnon, Maire O'Neill, Paolo Montuschi, and Fabrizio Lombardi, Design and Analysis of Majority Logic Based Approximate Adders and Multipliers, IEEE Transactions on Emerging Topics in Computing, DOI: 10.1109/TETC.2019.2929100.

[J31] Weiqiang Liu, Fabrizio Lombardi, and Michael Schulte, A Retrospective and Prospective View of Approximate Computing, Proceedings of the IEEE, vol. 108, no. 3, pp. 394-399, Mar. 2020.

[J30] Mingfu Xue, Chengxiang Yuan, Jian Wang and Weiqiang Liu, DPAEG: A Dependency Parse Based Adversarial Examples Generation Method for Intelligent Q&A Robots, Security and Communication Networks, Volume 2020, Article ID 5890820, 15 pages.

[J29] Weiqiang Liu, Qicong Liao, Fei Qiao, Weijie Xia, Fabrizio Lombardi, Approximate Designs for Fast Fourier Transform (FFT) with Application to Speech Recognition, IEEE Transactions on Circuits and Systems-I: Regular Papers, vol. 66, no. 12, pp. 4727-4739, Dec. 2019.

[J28] Weiqiang Liu, Sailong Fan, Ayesha Khalid, Ciara Rafferty, and Maire O'Neill, Optimised Schoolbook Polynomial Multiplication for Compact Lattice-based Cryptography on FPGAs, IEEE Transactions on Very Large Scale Integrated (VLSI) System, vol. 27, no. 10, pp. 2459-2463, 2019.

[J27] Mingfu Xue, Rongzhen Bian, Jian Wang, and Weiqiang Liu, Building an Accurate Hardware Trojan Detection Technique from Inaccurate Simulation Models and Unlabeled ICs, IET Computers & Digital Techniques, vol. 13, no. 4, pp. 348-359, 2019.

[J26] Haroon Waris, Chenghua Wang and Weiqiang Liu, High-Performance Approximate Half and Full Adder Cells using NAND Logic Gate, IEICE Electronics Express, vol. 16, no. 6, pp. 1-3, 2019.

[J25] Weiqiang Liu, Jian Ni, Zhe Liu, Chunyang Liu, and Maire O'Neill, Optimized Modular Multiplication for Supersingular Isogeny Diffie-Hellman, IEEE Transactions on Computers, vol. 68, no. 8, pp. 1249-1255, Aug. 2019.

[J24] Tingting Zhang, Vikramkumar Pudi, and Weiqiang Liu, New Majority Gate Based Parallel BCD Adder Designs for Quantum-dot Cellular Automata, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 66, no. 7, pp. 1232-1236, July 2019.

[J23] Weiqiang Liu, Tian Cao, Peipei Yin, Yuying Zhu, Chenghua Wang, Earl E. Swartzlander, Jr. and Fabrizio Lombardi, Design and Analysis of Approximate Redundant Binary Multipliers, IEEE Transactions on Computers, vol. 68, no. 6, June 2019.

[J22] Weiqiang Liu, Lei Zhang, Zhengran Zhang, Chongyan Gu, Chenghua Wang, Maire O'Neill, and Fabrizio Lombardi, XOR-Based Low-Cost Recon gurable PUFs for IoT Security, ACM Transactions on Embedded Computing Systems, vol. 18, no. 3, Article 25, Mar. 2019.

[J21] Chongyan Gu, Weiqiang Liu, Neil Hanley, Robert Hesselbarth, and Maire O'Neill, A Theoretical Model to Link Uniqueness and Min-Entropy for PUF Evaluations, IEEE Transactions on Computers, vol. 68, No. 2, pp. 287-293, 2019.

[J20] Mingfu Xue, Rongzhen Bian, Weiqiang Liu, Zhe Liu and Jian Wang, Defeating Untrustworthy Testing Parties: A Novel Hybrid Clustering Ensemble Based Golden Models-free Hardware Trojan Detection Method, IEEE Access, vol. 7, no. 1, pp. 5124-5140, 2019.

[J19] Linbin Chen, Jie Han, Weiqiang Liu, Paolo Monstuschi, and Fabrizio Lombardi, Design, Evaluation and Application of Approximate High-Radix Dividers, IEEE Transactions on Multi-Scale Computing Systems, vol. 4, no. 3, pp. 299-312, 2018.

[J18] Weiqiang Liu, Jiahua Xu, Danye Wang, Chenghua Wang, Paolo Montuschi and Fabrizio Lombardi, Design and Evaluation of Approximate Logarithmic Multipliers for Low Power Error-Tolerant Applications, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 65, no. 9, pp. 2856-2868, Sep. 2018.

[J17] Yijun Cui, Chongyan Gu, Chenghua Wang, Maire O'Neill and Weiqiang Liu, Ultra-lightweight and Reconfigurable Tristate Inverter Based Physical Unclonable Function Design, IEEE Access, vol. 6, no. 1, pp. 28478-28487, 2018.

[J16] Weiqiang Liu, Faqiang Mei, Chenghua Wang, Maire O'Neill and Earl E. Swartzlander Jr., Data Compression Device based on Modified LZ4 Algorithm, IEEE Transactions on Consumer Electronics, vol. 64, no. 1, pp. 110-117, 2018.

[J15] Peipei Yin, Chenghua Wang, Weiqiang Liu, Earl E. Swartzlander Jr. and Fabrizio Lombardi, Designs of Approximate Floating-Point Multipliers with Variable Accuracy for Error-Tolerant Applications, Journal of Signal Processing Systems, vol. 90, no. 4, pp. 641-654, 2018.

[J14] Xiaoping Cui, Weiqiang Liu, Shumin Wang, Earl E. Swartzlander Jr. and Fabrizio Lombardi, Design of High-Speed Wide-Word Hybrid Parallel-Pre x/Carry-Select and Skip Adders, Journal of Signal Processing Systems, vol. 90, no. 3, pp. 409-419, 2018.

[J13] Xiaoping Cui, Wenwen Dong, Weiqiang Liu, Earl E. Swartzlander Jr. and Fabrizio Lombardi, High Performance Parallel Decimal Multipliers using Hybrid BCD Codes, IEEE Transactions on Computers, vol. 66, no. 12, pp. 1994-2004, Dec. 2017. (Feature Paper of IEEE TC 2017 December Issue)

[J12] Weiqiang Liu, Liangyu Qian, Chenghua Wang, Honglan Jiang, Jie Han and Fabrizio Lombardi, Design of Approximate Radix-4 Booth Multipliers for Error-Tolerant Computing, IEEE Transactions on Computers, vol. 66, no. 8, pp. 1435-1441, Aug. 2017. (Most Popular Article of IEEE TC in July 2017)

[J11] Linbin Chen, Jie Han, Weiqiang Liu and Fabrizio Lombardi, Algorithm and Design of a Fully Parallel Approximate Coordinate Rotation Digital Computer (CORDIC), IEEE Transactions on Multi-Scale Computing Systems, vol. 3, no. 3, pp. 139-151, Sep. 2017.

[J10] Weiqiang Liu, Earl E. Swartzlander Jr. and Maire O'Neill, Guest Editorial: Introduction to the Special Issue on Emerging Technologies and Designs for Application-Speci c Computing, IEEE Transactions on Emerging Topics in Computing, vol. 5, no. 2, pp. 148-150, 2017.

[J9] Linbin Chen, Jie Han, Weiqiang Liu and Fabrizio Lombardi, On the Design of Approximate Restoring Dividers for Error-Tolerant Applications, IEEE Transactions on Computers, vol. 65, no. 8, pp. 2522-2533, Aug. 2016

[J8] Xiaoping Cui, Weiqiang Liu, Earl Swartzlander Jr. and Fabrizio Lombardi, A Modi ed Partial Product Generator for Redundant Binary Multipliers, IEEE Transactions on Computers, vol. 65, no. 4, pp. 1165-1171, Apr. 2016.

[J7] Weiqiang Liu, and Earl E. Swartzlander, Jr., Design of 3-D Quantum-dot Cellular Automata Adders, IEICE Electronics Express, vol. 12, no. 6, pp. 1587-1591, 2015.

[J6] Yifei Yu, Chenghua Wang, Weiqiang Liu, Yijun Cui, and Maire O'Neill, Improving RO PUF Design Using Frequency Distribution Characteristics, IEICE Electronics Express, vol. 12, no. 3, pp. 1043-1048, 2015.

[J5] Weiqiang Liu, Linbin Chen, Chenghua Wang, Maire O'Neill and Fabrizio Lombardi, Design and Analysis of Inexact Floating-Point Adders, IEEE Transactions on Computers, vol. 65, no. 1, pp. 308-314, Jan. 2016.

[J4] Weiqiang Liu, Liang Lu, Maire O'Neill and Earl E. Swartzlander, Jr., A First Step Towards Cost Functions for Quantum-dot Cellular Automata Designs, IEEE Transactions on Nanotechnology, vol. 13, no. 3, pp. 476-487, May 2014.

[J3] Liang Lu, Weiqiang Liu, Maire O'Neill and Earl E. Swartzlander, Jr., QCA Systolic Array Design, IEEE Transactions on Computers, vol. 62, no. 3, pp. 548-560, Mar. 2013.

[J2] Weiqiang Liu, Saket Srivastava, Liang Lu, Maire O'Neill and Earl E. Swartzlander, Jr., Are QCA Cryptographic Circuits Resistant to Power Analysis Attack?, IEEE Transactions on Nanotechnology, vol. 11, no. 6, pp. 1239-1251, Nov. 2012.

[J1] Weiqiang Liu, Liang Lu, Maire O'Neill, Earl E. Swartzlander, Jr. and Roger Woods, Design of Quantum-dot Cellular Automata Circuits Using Cut-Set Retiming, IEEE Transactions on Nanotechnology, vol. 10, no. 5, pp. 1150-1160, Sep. 2011.


International Conferences:

[C62] Weihua Xiao, Weikang Qian and Weiqiang Liu, GOMIL: Global Optimization of Multiplier by Integer Linear Programming, Proc. Design Automation and Test in Europe (DATE), 2021.

[C61] Zikun Zhao, Kai Mao, Weiqiang Liu, Ning Li,Shuangyi Yan, Qiuming Zhu, Wei Huang, An Efficient Hardware Generator for Massive Non-Stationary Fading Channels, IEEE GLOBECOM 2020 Workshop on Wireless Propagation Channels for 5G and B5G (GLOBECOM 2020), 2020.

[C60] Yuqin Dou, Chenghua Wang, Chongyan Gu, Shichao Yu, Maire O’Neill, Weiqiang Liu, Security Analysis of Hardware Trojans on Approximate Circuits, Proc. ACM/IEEE Great Lakes Symp. VLSI (GLSVLSI 2020), Sep. 2020.

[C59] Ziwei Wei, Yijun Cui, Yunpeng Chen, Chenghua Wang, Chongyan Gu, and Weiqiang Liu, Transformer PUF: Highly Flexible Configurable RO PUF Based on FPGA, IEEE International Workshop on Signal Processing Systems (SiPS 2020), 2020.

[C58] Can He, Mingfu Xue, Jian Wang, and Weiqiang Liu, Embedding Backdoors as the Facial Features: Invisible Backdoor Attacks Against Face Recognition Systems, Proc. ACM Turing Celebration Conference-China (TURC), 2020.

[C57] Tian Yuan, Jie Han, Fabrizio Lombardi, and Weiqiang Liu, Hardware-Oriented Compression Strategy and Efficient FPGA Implementations of CNNs without Off-Chip Memory, (Work-in-Progress) 57th ACM/IEEE Design Automation Conference (DAC), San Francisco, US, 2020.

[C56] Yijun Cui, Yunpeng Chen, Chongyan Gu, Chenghua Wang, Maire O'Neill, and Weiqiang Liu, Programmable Ring Oscillator PUF Based on Switch Matrix, Proc. IEEE Int. Symp. Circuits and Systems (ISCAS 2020), Seville, Spain, May 2020.

[C55] Dur-E-Shahwar Kundi, Song Bian, Ayesha Khalid, Chenghua Wang, Maire O'Neill, Weiqiang Liu, AxMM: Area and Power Efficient Approximate Modulo Multiplier for R-LWE Cryptosystem, Proc. IEEE Int. Symp. Circuits and Systems (ISCAS 2020), Seville, Spain, May 2020. (Invited Paper)

[C54] Shichao Yu, Chongyan Gu, Weiqiang Liu, Maire O'Neill, A Novel Feature Extraction Strategy for Hardware Trojan Detection, Proc. IEEE Int. Symp. Circuits and Systems (ISCAS 2020), Seville, Spain, May 2020.

[C53] Guocai Nan, Chenghua Wang, Fabrizio Lombardi, and Weiqiang Liu, DC-LSTM: Deep Compressed LSTM with the Low Bit-Width and Structured Matrices, Proc. IEEE Int. Symp. Circuits and Systems (ISCAS 2020), Seville, Spain, May 2020.

[C52] Yue Gao, Fabrizio Lombardi, and Weiqiang Liu, Design and Implementation of Approximate Softmax Layer for Deep Neural Networks, Proc. IEEE Int. Symp. Circuits and Systems (ISCAS 2020), Seville, Spain, May 2020.

[C51] Chongyan Gu, Chip Hong Chang, Weiqiang Liu, Shichao Yu, Qingqing Ma and Maire O'Neill, A Modeling Attack Resistant Deception Technique for Securing PUF based Authentication, Asian Hardware Oriented Security and Trust Symposium (AsianHOST 2019), 2019.

[C50] Chongyan Gu, Chip Hong Chang, Weiqiang Liu, Neil Hanley, Jack Miskelly and Maire O'Neill, A Large Scale Comprehensive Evaluation of Single-Slice Ring Oscillator and PicoPUF Bit Cells on 28nm Xilinx FPGAs, Attacks and Solutions in Hardware Security (ASHES 2019), 2019.

[C49] Jiang Li,Hao Gao,Yijun Cui, Chongyan Gu, Maire O'Neill and Weiqiang Liu, Theoretical Analysis of Configurable RO PUFs and Strategies to Enhance Security, IEEE International Workshop on Signal Processing Systems (SiPS 2019), Nanjing, China, Oct. 2019.

[C48] Haroon Waris, Chenghua Wang, Weiqiang Liu and Fabrizio Lombardi, Design of Power Efficient Approximate Systolic Array Architecture for Matrix Multiplication, IEEE International Workshop on Signal Processing Systems (SiPS 2019), Nanjing, China, Oct. 2019.

[C47] Weiqiang Liu, Majority Logic based Approximate Computing, IEEE International Conference on Nanotechnology, pp. 487-488, Macau, China, July 2019. (Invited Presentation)

[C46] Ayesha Khalid, Sarah McCarthy, Maire O'Neill, and Weiqiang Liu, Lattice-based Cryptography for IoT in A Quantum World: Are We Ready, IEEE International Workshop on Advances in Sensors and Interfaces (IWASI), Otranto, Italy, June 2019.

[C45] Zheyu Liu, Kaige Jia, Weiqiang Liu, Qi Wei, Fei Qiao, and Huazhong Yang, INA: Incremental Network Approximation Method for Limited Precision Deep Neural Networks, IEEE/ACM International Conference on Computer Aided Design (ICCAD), Westminster, US, Nov. 2019.

[C44] Tingting Zhang, Weiqiang Liu, Jie Han and Fabrizio Lombardi, Design and Analysis of Majority Logic Based Approximate Radix-4 Booth Multiplier, IEEE/ACM International Symposium on Nanoscale Architectures (2019), Qingdao, China, Jul. 2019.

[C43] Shichao Yu, Weiqiang Liu and Maire O'Neill, An Improved Automatic Hardware Trojan Generation Platform, IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2019), Miami, US, 2019.

[C42] Zhengran Zhang, Chongyan Gu, Chuan Zhang, Maire O'Neill, and Weiqiang Liu, "Theoretical Analysis of Delay-Based PUF and Design Strategies for its Improvement", Proc. IEEE Int. Symp. Circuits and Systems (ISCAS 2019), Sapporo, Japan.

[C41] Yale Wang, Chenghua Wang, Chongyan Gu, Maire O'Neill, and Weiqiang Liu, "Multi-Incentive Delay-Based (MID) PUF", Proc. IEEE Int. Symp. Circuits and Systems (ISCAS 2019), Sapporo, Japan.

[C40] Sailong Fan, Weiqiang Liu, James Howe, Ayesha Khalid and Maire O'Neill, "Lightweight Hardware Implementation of R-LWE Lattice-Based Cryptography", Proc. 14th IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), Chengdu, China, 2018.

[C39] Yue Fang, Qingqing Ma, Chongyan Gu, Chenghua Wang, Maire O'Neill and Weiqiang Liu, "Attacking Arbiter PUFs Using Various Modeling Attack Algorithms: A Comparative Study", Proc. 14th IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), Chengdu, China, 2018.

[C38] Ayesha Khalid, Ciara Rafferty, James Howe, Séamus Brannigan, Weiqiang Liu and Máire O'Neill, "Error Samplers for Lattice-Based Cryptography-Challenges, Vulnerabilities and Solutions", Proc. 14th IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), Chengdu, China, 2018.

[C37] Jack Miskelly, Chongyan Gu, Qingqing Ma, Yijun Cui, Weiqiang Liu and Maire O'Neill, "Modelling Attack Analysis of Configurable Ring Oscillator (CRO) PUF Designs", Proc. 23rd IEEE International Conference on Digital Signal Processing (DSP 2018), Shanghai, China, 2018.

[C36] Haroon Waris, Weiqiang Liu, Pengfei Huang, Ruzhe Ma, Chenghua Wang and Fabrizio Lombardi, "Design Exploration of Small Bit-Width Multipliers Using Approximate Logic Design (ALD) Tool", Proc. 23rd IEEE International Conference on Digital Signal Processing (DSP 2018), Shanghai, China, 2018.

[C35] Pengfei Huang, Chenghua Wang, Ruizhe Ma, Weiqiang Liu and Fabrizio Lombardi, "A Hardware/Software Co-Design Method for Approximate Semi-supervised K-Means Clustering", Proc. IEEE Computer Society Ann. Symp. VLSI (ISVLSI 2018), pp. 575-580, Hongkong SAR, China, 2018.

[C34] Faqiang Mei, Lei Zhang, Chongyan Gu, Yuan Cao, Chenghua Wang and Weiqiang Liu, "A Highly Flexible Lightweight and High Speed True Random Number Generator on FPGA, Proc. IEEE Computer Society Ann. Symp. VLSI (ISVLSI 2018), pp. 399-404, Hongkong SAR, China, 2018.

[C33] Weiqiang Liu, Jing Li, Tao Xu, Chenghua Wang, Paolo Montuschi and Fabrizio Lombardi, Combining Restoring Array and Logarithmic Dividers into an Approximate Hybrid Design, , Proc. 25rd IEEE Symposium on Computer Arithmetic (ARITH 25), pp. 80-86, Amherst, US, Jun. 2018.

[C32] Peipei Yin, Chenghua Wang, Weiqiang Liu and Fabrizio Lombardi, Design of Dynamic Range Approximate Logarithmic Multipliers, Proc. ACM/IEEE Great Lakes Symp. VLSI (GLSVLSI 2018), pp. 423-426, Chicago, US, May 2018.

[C31] Yuying Zhu, Weiqiang Liu, Jie Han and Fabrizio Lombardi, "A Probabilistic Error Model and Framework for Approximate Booth Multipliers", 14th IEEE / ACM International Symposium on Nanoscale Architectures (NANOARCH 2018), 2018.

[C30] Mingfu Xue, Rongzhen Bian, Jian Wang and Weiqiang Liu, "A Co-Training based Hardware Trojan Detection Technique by Exploiting Unlabeled ICs and Inaccurate Simulation Models", 17th IEEE International Conference On Trust, Security And Privacy In Computing And Communications (IEEE TrustCom), New York, USA, 2018.

[C29] Zheyu Liu, Kaige Jia, Yuying Zhu, Weiqiang Liu, Qi Wei, Fei Qiao, Ping Jin and Huazhong Yang, "Incremental Network Approximation on Limited Precision Neural Networks", (Work-in-Progress) 55th ACM/IEEE Design Automation Conference (DAC), San Francisco, US, 2018.

[C28] Qicong Liao, Weiqiang Liu, Fei Qiao, Chenghua Wang, and Fabrizio Lombardi, "Design of Approximate FFT with Bit-Width Selection Algorithms", Proc. IEEE Int. Symp. Circuits and Systems (ISCAS 2018), Florence, Italy.

[C27] Ke Chen, Jie Han, Paolo Montuschi, Weiqiang Liu and Fabrizio Lombardi, "Design and Application of an Approximate 2-D Convolver with Error Compensation", Proc. IEEE Int. Symp. Circuits and Systems (ISCAS 2018), Florence, Italy.

[C26] Chunyang Liu, Jian Ni, Weiqiang Liu, Zhe Liu, Maire O'Neill, "Design and Optimization of Modular Multiplication for SIDH", Proc. IEEE Int. Symp. Circuits and Systems (ISCAS 2018), Florence, Italy.

[C25] Tingting Zhang, Weiqiang Liu, Emma McLarnon, Maire O'Neill, and Fabrizio Lombardi, "Design of Majority Logic (ML) Based Approximate Full Adders", Proc. IEEE Int. Symp. Circuits and Systems (ISCAS 2018), Florence, Italy.

[C24] Qingqing Ma, Chongyan Gu, Chenghua Wang, Weiqiang Liu and Maire O'Neill, "A Machine Learning Attack Resistant Multi-PUF Design on FPGA", Proc. 23rd Asia and South Pacific Design Automation Conference (ASP-DAC 2018), pp. 97-104, Jeju Island, Korea, Jan. 2018. (Invited Paper)

[C23] Zhe Liu, Kimmo Jarvinen, Weiqiang Liu and Hwajeong Seo, "Multiprecision Multiplication on ARMv8", Proc. 24th IEEE Symposium on Computer Arithmetic (ARITH 24), pp. 10-17, London, UK, Jul. 2017.

[C22] Linbin Chen, Weiqiang Liu, Jie Han and Fabrizio Lombardi, "Design and Operational Assessment of an Intra-Cell Hybrid L2 Cache", Proc. 13th ACM/IEEE International Symposium on Nanoscale Architectures (NANOARCH 2017), pp. 1-6, Newport, US, Jul. 2017.

[C21] Lei Zhang, Chenghua Wang, Weiqiang Liu, Maire O'Neill and Fabrizio Lombardi, "XOR Gates Based Low-Cost Configurable RO PUF", Proc. IEEE Int. Symp. Circuits and Systems (ISCAS 2017), pp. 1452-1455, Baltimore, USA, May 2017.

[C20] Linbin Chen, Jie Han, Weiqiang Liu, Paolo Montuschi and Fabrizio Lombardi, "Design of Approximate High-Radix Dividers by Inexact Binary Signed-Digit Addition", Proc. ACM/IEEE Great Lakes Symp. VLSI (GLSVLSI 2017), pp. 293-298, Banff, Alberta, Canada, May 2017.

[C19] Weiqiang Liu, Jiahua Xu, Danye Wang and Fabrizio Lombardi, "Design of Approximate Logarithmic Multipliers", Proc. ACM/IEEE Great Lakes Symp. VLSI (GLSVLSI 2017), pp. 47-52, Banff, Alberta, Canada, May 2017.

[C18] Yijun Cui, Chenghua Wang, Weiqiang Liu and Maire O'Neill, "A Reconfigurable Memory PUF based on Tristate Inverter Arrays", IEEE International Workshop on Signal Processing Systems (SiPS 2016), pp. 171-176, Dallas, US, Oct. 2016.

[C17] Linbin Chen, Fabrizio Lombardi, Jie Han and Weiqiang Liu, "A Fully Parallel Approximate CORDIC Design", Proc. 12th ACM/IEEE International Symposium on Nanoscale Architectures (NANOARCH 2016), pp. 197-202, Beijing, China, Jul. 2016.

[C16] Tian Cao, Weiqiang Liu, Chenghua Wang, Xiaoping Cui and Fabrizio Lombardi, “Design of Approximate Redundant Binary Multipliers”, Proc. 12th ACM/IEEE International Symposium on Nanoscale Architectures (NANOARCH 2016), pp. 31-36, Beijing, China, Jul. 2016.

[C15] Peipei Yin, Chenghua Wang, Weiqiang Liu and Fabrizio Lombardi, "Design and Performance Evaluation of Approximate Floating-Point Multipliers", Proc. IEEE Computer Society Ann. Symp. VLSI (ISVLSI 2016), pp. 296-301, Pittsburgh, US, Jul. 2016. (Invited Paper)

[C14] Xiaoping Cui, Weiqiang Liu, Wenwen Dong and Fabrizio Lombardi, "A Parallel Decimal Multiplier Using Hybrid BCD Codes", Proc. 23rd IEEE Symposium on Computer Arithmetic (ARITH 23), pp. 150-155, Silicon Valley, US, Jul. 2016.

[C13] Yijun Cui, Chenghua Wang, Weiqiang Liu and Maire O'Neill, "Live Demonstration: An Automatic Evaluation Platform for Physical Unclonable Function Test", Proc. IEEE Int. Symp. Circuits and Systems (ISCAS 2016), pp. 2377-2377, Montreal, Canada, May 2016.

[C12] Liangyu Qian, Chenghua Wang, Weiqiang Liu, Fabrizio Lombardi and Jie Han, "Design and Evaluation of An Approximate Wallace-Booth Multiplier", Proc. IEEE Int. Symp. Circuits and Systems (ISCAS 2016), pp. 1974-1977, Montreal, Canada, May 2016.

[C11] Yijun Cui, Chenghua Wang, Weiqiang Liu, Yifei Yu, Maire O'Neill and Fabrizio Lombardi, "Low-Cost Configurable Ring Oscillator PUF with Improved Uniqueness," Proc. IEEE Int. Symp. Circuits and Systems (ISCAS 2016), pp. 558-561, Montreal, Canada, May 2016.

[C10] Linbin Chen, Jie Han, Weiqiang Liu, and Fabrizio Lombardi, "Design of Approximate Unsigned Integer Non-Restoring Divider for Inexact Computing", Proc. ACM/IEEE Great Lakes Symp. VLSI (GLSVLSI), pp. 51-56, Pittsburgh, US, May 2015. (Best Paper Candidate, Top 4)

[C9] Weiqiang Liu, Yifei Yu, Chenghua Wang, Yijun Cui and Máire O'Neill, "RO PUF Design in FPGAs with New Comparison Strategies", Proc. IEEE Int. Symp. Circuits and Systems (ISCAS 2015), pp. 77-80, Lisbon, Portugal, May 2015.

[C8] Weiqiang Liu, Linbin Chen, Chenghua Wang, Máire O'Neill and Fabrizio Lombardi, "Inexact floating-point adder for dynamic image processing", Proc. 14th IEEE Conf. Nanotechnolog, pp. 239 - 243, Toronto, Canada, Aug. 2014.

[C7] Emma McLarnon, Máire O'Neill, Weiqiang Liu and Ismo Hanninen, "Bit Erasure Analysis of Binary Adders in Quantum-dot Cellular Automata", Proc. 14th IEEE Conf. Nanotechnology, pp. 296-301, Toronto, Canada, Aug. 2014.

[C6] Weiqiang Liu, Saket Srivastava, Liang Lu, Máire O'Neill and Earl E. Swartzlander, Jr., "Power Analysis Attack of QCA Circuits: A Case Study of the Serpent Cipher", Proc. IEEE Int. Symp. Circuits and Systems (ISCAS 2013), pp. 2075-2078, Beijing, China, May 2013.

[C5] Weiqiang Liu, Máire O'Neill and Earl E. Swartzlander, Jr.,"A Review of QCA Adders and Metrics", Proc. 46th Asilomar Conf. Signals, Systems and Computers, pp. 747-751, Pacific Grove, US, Nov. 2012. (Invited Paper)

[C4] Weiqiang Liu, Liang Lu, Máire O'Neill and Earl E. Swartzlander, Jr., "Cost-Efficient Decimal Adder Design in Quantum-dot Cellular Automata", Proc. IEEE Int. Symp. Circuits and Systems (ISCAS 2012), pp. 1347-1350, Seoul, Korea, May 2012.

[C3] Weiqiang Liu, Liang Lu, Máire O'Neill, Earl E. Swartzlander, Jr., "Design Rules for Quantum-dot Cellular Automata", Proc. IEEE Int. Symp. Circuits and Systems (ISCAS 2011), pp. 2361-2364, Rio de Janeiro, Brazil, May 2011. (Finalist in the Best Paper Contest, Top 8)

[C2] Weiqiang Liu, Liang Lu, Máire O'Neill and Earl E. Swartzlander, Jr., "Montgomery Modular Multiplier Design in Quantum-dot Cellular Automata Using Cut-Set Retiming", Proc. 10th IEEE Conf. Nanotechnology, pp.205-210, Seoul, Korea, Aug. 2010.

[C1] Liang Lu, Weiqiang Liu, Máire O'Neill and Earl E. Swartzlander, Jr., "QCA Systolic Matrix Multiplier“, Proc. IEEE Computer Society Ann. Symp. VLSI (ISVLSI 2010), pp.149-154, Lixouri Kefalonia, Greece, Jul. 2010.


Chinese Journals:

[CJ6] 芮康康, 王成华, 范赛龙, 刘伟强. 一种高性能R-LWE格加密算法的电路结构及其FPGA实现J], 数据采集与处理, 2019, 34(4): 689-696.

[CJ5] 刘伟强, 王成华, 洪峰, 王龙军, 胡志忠. 互联网+教育的电子技术课程教学模式改革[J], 电气电子教学学报, 2018, 40(5):71-74.

[CJ4] 刘伟强, 崔益军, 王成华. 一种低成本物理不可克隆函数结构的设计实现及其RFID应用[J], 电子学报, 2016, 44(7): 1772-1776.

[CJ3] 崔晓平, 王书敏, 刘伟强, 董文雯. 条件推测性十进制加法器的优化设计[J]. 电子与信息学报, 2016, 38(10): 2689-2694.

[CJ2] 肖永生, 周建江, 刘思峰, 张可, 刘伟强. 基于灰色系统的雷达目标高分辨距离像识别[J]. 控制与决策, 2011, 26(07): 1036-1040.

[CJ1] 张贞凯, 汪飞, 周建江, 刘伟强. 多目标跟踪中自适应时间资源调度[J]. 航空学报, 2011, 32(03): 522-530.