个人信息

姓　　名: 王伟 性　　別: 男 导师类型: 硕士生导师
技术职称: 副教授 电子邮箱: wangwej@njupt.edu.cn
学术型硕士招生学科: (080901)物理电子学
专业型硕士招生类别(领域): (085400)电子信息

个人简介:王伟（1964年5月），男，汉族，江苏扬州人，副教授，毕业于东南大学，获生物医学工程专业工学博士学位。现在南京邮电大学电子科学与工程学院从事纳电子器件、新型碳基器件以及集成电路的科研教学工作，担任电子科学与技术系系主任职务。主持一项江苏省高校自然科学研究面上项目“Graphene-based新型自旋场效应管研究（No 10KJD510006）”；作为主要参加者参与一项国家自然科学基金“基于标准CMOS工艺的新型表面超级结射频LDMOS及其模型研究（No **）”，另外，作为主要参加者参与一项江苏省高校自然科学研究面上项目“新型石墨烯材料结构及量子自旋霍尔效应研究（No 10KJD510005）”。担任Nanotechnology, Solid-state Electronics、Materials Science in Semiconductor Processing，以及Superlattices and Microstructures等十几个知名期刊的审稿人。近年来，在国内外主要学术刊物上发表论文40余篇, 其中其中Sci收录20余篇，包括IEEE Transactions on Electron Devices，Solid State Electronics，Superlattices and Microstructures，Materials Science in Semiconductor Processing等国际核心期刊，申报专利12项。
研究领域:目前研究方向：纳电子器件包括单电子器件、纳米MOSFET、纳米存储器以及自旋MOS器件的量子输运研究以及光电性能研究，新型碳基电子器件和集成电路的设计以及在射频电子中的应用。主要成果简介：（1）对各种纳电子器件，包括单电子器件、纳米MOSFET、纳米存储器以及自旋MOS器件的设计模型进行了研究，并基于量子力学理论建立量子隧穿模型来描述纳米尺度的MOS器件结构中非平衡电子输运现象。（2）提出一种新的碳基器件的结构。基于纳米CNTFET器件的栅工程和沟道工程技术，在CNTFET器件中进行LDD掺杂和采用异质栅，这种新结构能有效提高器件的开关电学性能以及提高截止频率，将这种新结构器件构成集成电路能够有效提高速度以及降低能耗。（3）首次提出了通过控制介质中掺氮量来实现介质锥形势垒的方法。研究了高k栅介质中不同含氮量引起的存储器件的栅电流，结果显示，采用构成的介质锥形隧穿势垒，不仅能够同时满足编程速度和信息保存时间这两方面的基本要求，而且与均匀的HfSiON介质势垒相比，锥形势垒具有更高的Iprog/Iret即相应的存储器件具有更好的存储电学性能。代表性著作：[1] 王伟, 黄岚, 张宇, 李昌敏, 张海黔, 顾宁, 沈浩瀛, 陈堂生, 郝丽萍, 彭力, 赵丽新, “用分子自组装技术制备的单电子器件的Monte Carlo 模拟”, 物理学报, 2002, 51(1): 63-67.[2] Wei Wang, Ning Gu, J.P. Sun, and P. Mazumder, “Gate Current Modeling of High-k Stack Nanoscale MOSFETs”, Solid State Electronics, 2006, 50(9) :1489-1494. [3] J. P. Sun, Wei Wang, Toru Toyabe, Ning Gu, and Pinaki Mazumder, “Modeling of Gate Current and Capacitance in Nanoscale-MOS Structures”, IEEE Transactions on Electron Devices, 2006, 53(12): 2950-2957. [4] Wang Wei , Sun Jianping, and Gu Ning, “Modeling of Gate Tunneling Current for Nanoscale MOSFETs with High-k Gate Stacks”, Chinese Journal of Semiconductors, 2006, 27(7) :1170-1176. [5] Wei Wang, Jianhui Liao, Jianping Sun, and Ning Gu, “Simulation of the electrical characteristics of a one-dimensional quantum dot array”, Superlattices and Microstructures, 2008,44 (6): 721-727. [6] Wei Wang, J. P. Sun, Toru Toyabe, Ning Gu, and Pinaki Mazumder, “Modeling of high-k gate stack of tunnel barrier in nonvolatile memory MOS structure”, IEEE nano 2008, 8th IEEE Conference on Nanotechnology, 2008: 3-5. [7] Wei Wang, Xiao Yang, Na Li, Lu Zhang, Ting Zhang, and Gongshu Yue, “Numerical study on the performance metrics of lightly doped drain and source graphene nanoribbon field effect transistors with double-material-gate”，Superlattices and Microstructures, 2013, 64 (9): 227–236. [8] Wei Wang, Na Li, Chunping Xia, Guangran Xiao, Yuzhou Ren, Hao Li, Lifen Zheng, Jin Li, Junjie Jiang, Xiaoping Chen, and Kai Wang, “Quantum Simulation Study of single halo dual-material gate CNTFETs”, Solid State Electronics, 2014, 91(1): 147–151. [9] Wei Wang，Xiao Yang，Na Li，Guangran Xiao，Sitao Jiang，Chunping Xia，and Yan Wang, “Transport study of gate and channel engineering on the surrounding-gate CNTFETs based on NEGF quantum theory”, Journal of Computational Electronics, 2014, 13(1):192–197. [10] Wei Wang, Ting Zhang, Lu Zhang, Na Li, Gongshu Yue, and Xiao Yang, “High-frequency and switching performance investigation of novel lightly-doped drain and source hetero-material-gate carbon nanotube field effect transistors”, Materials Science in Semiconductor Processing, 2014, 21(5): 132–139. [11] Wei Wang, Xiao Yang, Na Li, Lu Zhang, Gongshu Yue, and Ting Zhang, “The high-frequency performance of hetero-material-gate CNTFETs with gate underlap”, Fullerenes, Nanotubes and Carbon Nanostructures, 2014, 23(4), 315–319. [12] Wei Wang, Huan Wang, Xueying Wang, Na Li, Changru Zhu, Guangran Xiao, Xiao Yang, Lu Zhang, Ting Zhang, “Quantum transport simulations of CNTFETs: performance assessment and comparison study with GNRFETs”, Journal of Semiconductor Technology and Science, 2014, 14(5), 615–624. [13] Wang Wei, Yue Gongshu, Jiang Sitao, Yu Haining, and Zhang Ting, “A Computational study of gate and Channel Engineering for GNRFETs performance enhancement”, International Journal of Electronics Letters, 2014, 2(3), 135–146. [14] Wang Wei, Li Na, Ren Yuzhou, Li Hao, Zheng Lifen,Li Jin, Jiang Junjie, and Chen Xiaoping, Wang Kai,and Xia Chunping, “A computational study of the effects of linear doping profile on the high-frequency and switching performances of hetero-material-gate CNTFETs”, Journal of Semiconductors, 2013, 34(12): 124002(1-6). [15] Wei Wang , Gongshu Yue，Xiao Yang, Lu Zhang, and Ting Zhang, “Quantum transport study of double gate hetero gate oxide and LDD doping graphene nanoribbon p-i-n Tunnel FETs”, Journal of Semiconductors, 2014,35(6): 064006(1-6).[16] Wang Wei, Zhang Lu, Wang Xueying, Wang Zhubing, Zhang Ting, Li Na, Yang Xiao, Yue Gongshu, “The combined effects of halo and linear doping effects on the high-frequency and switching performance in ballistic CNTFETs”, Journal of Semiconductors, 2014,35(11): 114004(1-8).