吴丽娟，女，汉族，四川乐山人，中共党员，博士，副教授。2005年于四川大学取得通信与信息系统的硕士学位。2012于电子科技大学取得微电子学与固体电子学的博士学位。2014年7月至今在长沙理工大学物理与电子科学学院工作。
主要研究方向
微电子学与固体电子学（功率半导体器件）。
主持国家自然科学基金青年项目、省教育厅科研项目和理工大学基金项目的研究。在国内外著名刊物如SUPERLATTICES AND MICROSTRUCTURES ; ELECTRONICS LETTERS; CHIN.PHYS. LETT; CHIN.PHYS.B; JOURNAL OF SEMICONDUCTORS等刊物上以第一作者发表文章40余篇，其中SCI 20余篇。申请发明专利11项，专著1部。
从事研究生《半导体物理》、《半导体功率器件》和本科生《微电子器件》、《微电子工艺学》、《固体物理与半导体物理》等课程的教学工作。指导本科生创新项目2项，教改2项，其中省级重点项目1项，发表教改论文10余篇。
研究小组(PDL小组）每年招收硕士生2-4名。毕业的硕士研究生直接进入名企（如著名上海中芯国际、长江存储、长鑫存储、士兰集成电路公司等）担任项目工程师或研发工程师。同时每年指导本科毕业生10余名。欢迎对微电子器件设计和集成技术感兴趣的同学加入我们的研究队伍。
代表性论文
[1]Lijuan Wu*, Qilin Ding, Jiaqi Chen, Improved deep trench super-junction LDMOS breakdown voltage by shielded Silicon-Insulator-Silicon capacitor, Silicon，2020.
[2]Lijuan Wu*, Lin Zhu, Xing Chen,Variable-K double trenches SOI LDMOS with high-concentration P-pillar，Chin. Phys. B . 2020, 29(5): 057701 . doi: 10.1088/1674-1056/ab7e94.
[3]Lijuan Wu*, Lin Zhu, Xing Chen,Novel high-k SOI LDMOS with N+ buried layer, IETE Technical Review、2020.
[4]Lijuan Wu*, Qinlin Ding, Yinyan Zhang,Ye Huang, Lin Zhu, Bing Lei, A lateral double-diffusion metal oxide semiconductor device with a gradient charge compensation layer, Journal of Electronic Materials, pp 1–7,24 September 2019, Online ISSN 1543-186X,doi: 10.1007/s11664-019-07579-8.
[5]Lijuan Wu*, Ye Huang, Yiqing Wu, Lin Zhu, Bing Lei, Investigation of the stepped split protection gate L-Trench SOI LDMOS with ultra-low specific on-resistance by simulation, Materials Science in Semiconductor Processing, vol. 101, pp. 272-278, Oct. 2019, doi:10.1016/j.mssp.2019.05.035.
[6]Lijuan Wu*, Yiqing Wu, Bing Lei, Yinyan Zhang, Ye Huang, Lin Zhu, PSJ LDMOS with a VK dielectric layer, Micro & Nano Letters, vol. 14, no. 6, pp. 600-603, 2019, ISSN：1750-0443. doi: 10.1049/mnl.2018.5467.
[7]Lijuan Wu*, Yiqing Wu, Yinyan Zhang, Bing Lei, Lin Zhu, Ye Huang. High-Voltage Lateral Double-Diffused Metal-Oxide Semiconductor with Double Superjunction, Journal of Electronic Materials, 2019, 48(4): 2456-2462, ISSN: 1543-186X. doi: 10.1007/s11664-019-07030-y.
[8]Li-juan Wu*, Yin-yan Zhang, Hang Yang, Yue Song, Na Yuan, Bing Lei, Li-min Hu, Yi-qing Wu. Optimization of novel superjunction LDMOS with partial low K layer. Superlattices and Microstructures, 2018.
[9]Li-juan Wu*, Hang Yang, Yin-yan Zhang, Yue Song, Na Yuan, Bing Lei, Yi-qing Wu. A Superjunction LDMOS with Steps Buried Oxide. Journal of Electronic Materials, 2018.
[10]Li-juan Wu*, Bing Lei, Hang Yang, Yue Song, Yin-yan Zhang. A 4H-SiC junction barrier Schottky diode with segregated floating trench and super junction. Superlattices and Microstructures, 2018.
[11]Li-juan Wu*, Na Yuan, Lei Bing, Yin-yan Zhang, Yue Song. Split-gate LDMOS with Double Vertical Field Plates. Micro & Nano Letters, 2018.
[12]Li-juan Wu*, Yang Hang, Yi-qing Wu, Bing Lei, Na Yuan, Yue Song, Li-min Hu, Yin-yan Zhang. A novel superjunction lateral double-diffused MOS with segmented buried P-layer. Superlattices and Microstructures, 2018, 116:262-268.
[13]Li-juan Wu*, Yue Song, Hang Yang, Li-min Hu, Bing Lei, Na Yuan, Yin-yan Zhang, Zhong-jie Zhang. PSOI pLDMOS with n-buried layer. Micro & Nano Letters, 2017, 12(10):726-730.
[14]Li-juan Wu*, Yue Song, Hang Yang, Li-min Hu, Na Yuan, Bing Lei, Yin-yan Zhang, Zhong-jie Zhang. A novel high voltage LDMOS with body depletion termination. International Journal of Electronics Letters, 2017:1-9.
[15]Li-juan Wu*, Zhong-jie Zhang, Yue Song, Hang Yang, Li-min Hu, Na Yuan. Novel high- with low specific on-resistance high voltage lateral double-diffused MOSFET. Chinese Physics B, 2017, 26(2):382-386.
[16]Li-juan Wu*, Wen-tong Zhang, Qin Shi, Peng-fei Cai, Hang-cheng He. Trench SOI LDMOS with vertical field plate. Electronics Letters, 2014, 50(25):1982-1984.
[17]Li-juan Wu*, Wen-tong Zhang, Bo Zhang, Zhao-ji Li. A Novel Silicon-on-Insulator Super-Junction Lateral-Double-Diffused Metal-Oxide-Semiconductor Transistor with T-Dual Dielectric Buried Layer, Chinese Physics Letters, 2013, 30(12): 127102.
[18]Li-juan Wu*, Wen-tong Zhang, Ming Qiao , Bo Zhang, Zhao-ji Li. SOI SJ high voltage device with linear variable doping interface thin silicon layer. Electronics Letters, 2012, 48(5):287.
[19]Li-juan Wu*, Sheng-dong Hu, Bo Zhang, Zhao-ji Li. Novel high-voltage power device based on self-adaptive interface charge. Chinese Physics B, 2011, 20(2):027101.
[20]Li-juan Wu*, Sheng-dong Hu, Bo Zhang, Xiao-rong Luo, Zhao-ji Li. A --188 V 7.2 Ω·mm2, P-channel high voltage device formed on an epitaxy-SIMOX substrate. Chinese Physics B, 2011, 20(8):327-334.
[21]Li-juan Wu*, Sheng-dong Hu, Bo Zhang, Xiao-rong Luo, Zhao-ji Li. Partial-SOI high voltage P-channel LDMOS with interface accumulation holes. Chin. Phys. B, 2011, 20(10):107101.
[22]Li-juan Wu*, Ze-hong Li, Bo Zhang, Zhao-ji Li. PB-SON RFLDMOS characteristics analysis. Compel International Journal for Computation & Mathematics in Electrical & Electronic Engineering, 2010, 29(2): 522-527.
[23]Na Yuan, Li-juan Wu*, Hang Yang, Yue Song, Li-min Hu, Bing Lei, Yin-yan Zhang. Double trenches LDMOS with trapezoidal gate. Micro & Nano Letters, 2018, 13(5):695-698.
代表性科研项目
[1] 基于SOI的横向SJ等效耐压层理论及新结构，国家自然科学青年基金、国家级
[2] 新型纵向场板高压器件模型与结构研究，湖南省教育厅项目、省级
[3] 表面异位横向超结器件新结构及模型研究，湖南省教育厅科学研究开放平台项目
申请专利
（1）吴丽娟，袁娜，杨航，胡利民，宋月，雷冰，张银艳，章中杰.一种高耐压低比导的高K功率器件.中国，发明专利，2016.12，申请号：20**
（2）吴丽娟，杨航，章中杰，宋月，胡利民，袁娜.一种低比导的高压功率器件.中国,发明专利,2016.12，申请号：5
（3）吴丽娟，宋月，章中杰，杨航，胡利民，袁娜.低比导的新型高压SJ功率器件.中国，发明专利，2016.4，申请号：20**
（4）吴丽娟，张银艳，朱琳，黄也，雷冰，吴怡清.一种具有阶梯埋氧层的超结横向高压器件. 中国,发明专利,2018.7，申请号：20**
（5）吴丽娟，吴怡清，张银艳，朱琳，黄也，雷冰.一种具有变k埋层的高耐压低比导横向部分超结功率器件. 中国,发明专利,2018.7，申请号：20**
（6）吴丽娟，吴怡清，朱琳，黄也，张银艳，雷冰.一种具有分段P埋层的高耐压低比导横向超结功率器件. 中国,发明专利,2018.7，申请号：2X
（7）吴丽娟，黄也，朱琳，吴怡清，张银艳，雷冰.一种具有双纵向场板的分离栅槽型功率器件. 中国,发明专利,2018.8，申请号：20**
（8）吴丽娟，雷冰，张席旗，张银艳，朱琳，黄也，吴怡清.一种具有渐变式电荷补偿层的横向超结功率器件. 中国,发明专利,2018.9，申请号：20**
出版专著
《功率半导体异质耐压层电荷场优化技术》，北京邮电大学出版社，2018.12
联系方式
Email: @qq.com
通讯地址:(邮政编码410004)湖南省长沙市雨花区万家丽南路二段960号，长沙理工大学物理与电子科学学院