曾学文1, 2, 3,,,
郭志川1, 2, 3
1.中国科学院声学研究所国家网络新媒体工程技术研究中心 ??北京 ??100190
2.中国科学院大学电子电气与通信工程学院 ??北京 ??100190
3.北京中科视云科技有限公司 北京 100190
基金项目:中国科学院战略性科技先导专项课题(XDC02010701)
详细信息
作者简介:赵军:男,1991年生,博士生,研究方向为信息安全
曾学文:男,1968年生,研究员,研究方向为网络新媒体技术
郭志川:男,1975年生,研究员,研究方向为FPGA硬件加速技术
通讯作者:曾学文 zengxw@dsp.ac.cn
中图分类号:TP393.08计量
文章访问数:2746
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PDF下载量:86
被引次数:0
出版历程
收稿日期:2019-01-03
网络出版日期:2019-04-25
刊出日期:2019-10-01
Design and Implementation of High Speed PCIe Cipher Card Supporting GM Algorithms
Jun ZHAO1, 2,Xuewen ZENG1, 2, 3,,,
Zhichuan GUO1, 2, 3
1. National Network New Media Engineering Research Center, Institute of Acoustics, Chinese Academy of Sciences, Beijing 100190, China
2. School of Electronic, Electrical and Communication Engineering, University of Chinese Academy of Sciences, Beijing 100190, China
3. Beijing Zhongke Vision Cloud Technology Co., Ltd., Beijing 100190, China
Funds:Strategic Priority Research Program of the Chinese Academy of Sciences(XDC02010701)
摘要
摘要:密码卡在信息安全领域发挥着重要作用,但当前密码卡存在性能不足的问题,难以满足高速网络安全服务的需要。该文提出一种基于MIPS64多核处理器的高速PCIe密码卡的设计与系统实现方法,支持SM2/3/4国产密码(GM)算法以及RSA, SHA, AES等国际密码算法,系统包括硬件模块,密码算法模块,主机驱动模块和接口调用模块;对SM3的实现提出一种优化方案,性能提升了19%;支持主机以Non-Blocking方式发送请求,单进程应用即可获得密码卡满载性能。该卡在10核CPU下SM2签名和验证速度分别为18000次/s和4200次/s, SM3杂凑速度2200 Mbps, SM4加/解密速度8/10 Gbps,多项指标达到较高水平;采用1300 MHz主频16核CPU时,SM2/3的性能指标提高1倍,采用48核CPU时SM2签名速度可达到105次/s。
关键词:密码卡/
PCIe总线/
国产密码算法/
非阻塞
Abstract:Cipher cards play an important role in the field of information security. However, the performance of cipher cards are insufficient, and it is difficult to meet the needs of high-speed network security services. A design and system implementation method of high-speed PCIe cipher card based on MIPS64 multi-core processor is proposed, which supports the GM algorithm SM2/3/4 and international cryptographic algorithms, such as RSA, SHA and AES. The implemented system includes module of hardware, cryptographic algorithm, host driver and interface calling. An optimization scheme for the implementation of SM3 is proposed, the performance is improved by 19%. And the host to send requests in Non-Blocking mode is supported, so a single-process application can get the cipher card’s full load performance. Under 10-core CPU, the speed of SM2 signature and verification are 18000 and 4200 times/s, SM3 hash speed is 2200 Mbps, SM4 encryption/decryption speed is 8/10 Gbps, multiple indicators achieve higher level; When using 16-core CPU @1300 MHz, SM2/3 performance can be improved by more than 100%, and the speed of SM2 signature could achieve 105 times/s with 48-core CPU.
Key words:Cipher card/
PCIe bus/
GM algorithm/
Non-Blocking
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